memset(counters,0,sizeof(counters));
// vector stuff
+ vecbanks = 0xff;
+ vecbanks_count = 8;
utidx = -1;
vlmax = 8;
vl = 0;
- nxpr_all = 256;
- nfpr_all = 256;
+ nxfpr_bank = 256;
nxpr_use = 0;
nfpr_use = 0;
for (int i=0; i<MAX_UTS; i++)
void processor_t::vcfg()
{
- if (nxpr_use == 0 && nfpr_use == 0)
- vlmax = 8;
- else if (nfpr_use == 0)
- vlmax = (nxpr_all-1) / (nxpr_use-1);
- else if (nxpr_use == 0)
- vlmax = (nfpr_all-1) / (nfpr_use-1);
+ if (nxpr_use + nfpr_use < 2)
+ vlmax = nxfpr_bank * vecbanks_count;
else
- vlmax = std::min((nxpr_all-1) / (nxpr_use-1), (nfpr_all-1) / (nfpr_use-1));
+ vlmax = (nxfpr_bank / (nxpr_use + nfpr_use - 1)) * vecbanks_count;
vlmax = std::min(vlmax, MAX_UTS);
}
#include "mmu.h"
#include "icsim.h"
-#define MAX_UTS 32
+#define MAX_UTS 2048
class sim_t;
reg_t evec;
reg_t tohost;
reg_t fromhost;
- reg_t vecbanks;
reg_t pcr_k0;
reg_t pcr_k1;
uint32_t id;
uint32_t sr;
uint32_t count;
uint32_t compare;
- uint32_t vecbanks_count;
// unprivileged control registers
uint32_t fsr;
void vcfg();
void setvl(int vlapp);
+ reg_t vecbanks;
+ uint32_t vecbanks_count;
+
bool utmode;
int utidx;
int vlmax;
int vl;
- int nxpr_all;
- int nfpr_all;
+ int nxfpr_bank;
int nxpr_use;
int nfpr_use;
processor_t* uts[MAX_UTS];