Merge pull request #1604 from whitequark/unify-ram-naming

Harmonize BRAM/LUTRAM descriptions across all of Yosys

diff --cc techlibs/anlogic/synth_anlogic.cc
index 57b8a2b266188c2f51a1226d3a1c0d0f81129636,3a199258881fb7035e31521994484d83556afe44..aaa6bda4a0b5e87431385f6ce2c388afb65c033f
--- 1/techlibs/anlogic/synth_anlogic.cc
--- 2/techlibs/anlogic/synth_anlogic.cc
+++ b/techlibs/anlogic/synth_anlogic.cc
@@@ -58,8 -58,11 +58,11 @@@ struct SynthAnlogicPass : public Script
                log("        do not flatten design before synthesis\n");
                log("\n");
                log("    -retime\n");
 -              log("        run 'abc' with -dff option\n");
 +              log("        run 'abc' with '-dff -D 1' options\n");
                log("\n");
+               log("    -nolutram\n");
+               log("        do not use EG_LOGIC_DRAM16X4 cells in output netlist\n");
+               log("\n");
                log("\n");
                log("The following commands are executed by this synthesis command:\n");
                help_script();
@@@ -162,9 -170,13 +170,13 @@@
                        run("opt -fast -mux_undef -undriven -fine");
                        run("memory_map");
                        run("opt -undriven -fine");
+               }
+ 
+               if (check_label("map_gates"))
+               {
                        run("techmap -map +/techmap.v -map +/anlogic/arith_map.v");
                        if (retime || help_mode)
 -                              run("abc -dff", "(only if -retime)");
 +                              run("abc -dff -D 1", "(only if -retime)");
                }
  
                if (check_label("map_ffs"))

diff --cc techlibs/ecp5/synth_ecp5.cc
Simple merge

diff --cc techlibs/efinix/synth_efinix.cc
index 6fe0182ac250cf7b019cc48925b3915b050eb0ac,3e52743855afc02f05d4299bc714563ded5af5b8..0efd917089e824e0566f13d5593f18273045359a
--- 1/techlibs/efinix/synth_efinix.cc
--- 2/techlibs/efinix/synth_efinix.cc
+++ b/techlibs/efinix/synth_efinix.cc
@@@ -58,8 -58,11 +58,11 @@@ struct SynthEfinixPass : public ScriptP
                log("        do not flatten design before synthesis\n");
                log("\n");
                log("    -retime\n");
 -              log("        run 'abc' with -dff option\n");
 +              log("        run 'abc' with '-dff -D 1' options\n");
                log("\n");
+               log("    -nobram\n");
+               log("        do not use EFX_RAM_5K cells in output netlist\n");
+               log("\n");
                log("\n");
                log("The following commands are executed by this synthesis command:\n");
                help_script();
@@@ -162,9 -170,13 +170,13 @@@
                        run("opt -fast -mux_undef -undriven -fine");
                        run("memory_map");
                        run("opt -undriven -fine");
+               }
+ 
+               if (check_label("map_gates"))
+               {
                        run("techmap -map +/techmap.v -map +/efinix/arith_map.v");
                        if (retime || help_mode)
 -                              run("abc -dff", "(only if -retime)");
 +                              run("abc -dff -D 1", "(only if -retime)");
                }
  
                if (check_label("map_ffs"))

diff --cc techlibs/gowin/synth_gowin.cc
Simple merge

diff --cc techlibs/intel/synth_intel.cc
Simple merge