+2018-02-14 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
+ PR target/84239
+ * config/i386/cetintrin.h: Remove _rdssp[d|q] and
+ add _get_ssp intrinsics. Remove argument from
+ __builtin_ia32_rdssp[d|q].
+ * config/i386/i386-builtin-types.def: Add UINT_FTYPE_VOID.
+ * config/i386/i386-builtin.def: Remove argument from
+ __builtin_ia32_rdssp[d|q].
+ * config/i386/i386.c: Use UINT_FTYPE_VOID. Use
+ ix86_expand_special_args_builtin for _rdssp[d|q].
+ * config/i386/i386.md: Remove argument from rdssp[si|di] insn.
+ Clear register before usage.
+ * doc/extend.texi: Remove argument from __builtin_ia32_rdssp[d|q].
+ Add documentation for new _get_ssp and _inc_ssp intrinsics.
+
2018-02-14 Richard Sandiford <richard.sandiford@linaro.org>
PR tree-optimization/84357
#define __DISABLE_SHSTK__
#endif /* __SHSTK__ */
-extern __inline unsigned int
-__attribute__((__gnu_inline__, __always_inline__, __artificial__))
-_rdsspd (unsigned int __B)
-{
- return __builtin_ia32_rdsspd (__B);
-}
-
#ifdef __x86_64__
extern __inline unsigned long long
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
-_rdsspq (unsigned long long __B)
+_get_ssp (void)
{
- return __builtin_ia32_rdsspq (__B);
+ return __builtin_ia32_rdsspq ();
}
-#endif
-
-extern __inline void
+#else
+extern __inline unsigned int
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
-_incsspd (unsigned int __B)
+_get_ssp (void)
{
- __builtin_ia32_incsspd (__B);
+ return __builtin_ia32_rdsspd ();
}
+#endif
-#ifdef __x86_64__
extern __inline void
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
-_incsspq (unsigned long long __B)
+_inc_ssp (unsigned int __B)
{
- __builtin_ia32_incsspq (__B);
-}
+#ifdef __x86_64__
+ __builtin_ia32_incsspq ((unsigned long long) __B);
+#else
+ __builtin_ia32_incsspd (__B);
#endif
+}
extern __inline void
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
DEF_FUNCTION_TYPE (FLOAT128)
DEF_FUNCTION_TYPE (UINT64)
DEF_FUNCTION_TYPE (UNSIGNED)
+DEF_FUNCTION_TYPE (UINT)
DEF_FUNCTION_TYPE (USHORT)
DEF_FUNCTION_TYPE (INT)
DEF_FUNCTION_TYPE (VOID)
BDESC_END (CET, CET_NORMAL)
BDESC_FIRST (cet_rdssp, CET_NORMAL,
- OPTION_MASK_ISA_SHSTK, CODE_FOR_rdsspsi, "__builtin_ia32_rdsspd", IX86_BUILTIN_RDSSPD, UNKNOWN, (int) UINT_FTYPE_UINT)
-BDESC (OPTION_MASK_ISA_SHSTK | OPTION_MASK_ISA_64BIT, CODE_FOR_rdsspdi, "__builtin_ia32_rdsspq", IX86_BUILTIN_RDSSPQ, UNKNOWN, (int) UINT64_FTYPE_UINT64)
+ OPTION_MASK_ISA_SHSTK, CODE_FOR_rdsspsi, "__builtin_ia32_rdsspd", IX86_BUILTIN_RDSSPD, UNKNOWN, (int) UINT_FTYPE_VOID)
+BDESC (OPTION_MASK_ISA_SHSTK | OPTION_MASK_ISA_64BIT, CODE_FOR_rdsspdi, "__builtin_ia32_rdsspq", IX86_BUILTIN_RDSSPQ, UNKNOWN, (int) UINT64_FTYPE_VOID)
BDESC_END (CET_NORMAL, MAX)
case INT_FTYPE_VOID:
case USHORT_FTYPE_VOID:
case UINT64_FTYPE_VOID:
+ case UINT_FTYPE_VOID:
case UNSIGNED_FTYPE_VOID:
nargs = 0;
klass = load;
&& fcode <= IX86_BUILTIN__BDESC_CET_NORMAL_LAST)
{
i = fcode - IX86_BUILTIN__BDESC_CET_NORMAL_FIRST;
- return ix86_expand_args_builtin (bdesc_cet_rdssp + i, exp,
+ return ix86_expand_special_args_builtin (bdesc_cet_rdssp + i, exp,
target);
}
reg_ssp = gen_reg_rtx (word_mode);
emit_insn (gen_rtx_SET (reg_ssp, const0_rtx));
emit_insn ((word_mode == SImode)
- ? gen_rdsspsi (reg_ssp, reg_ssp)
- : gen_rdsspdi (reg_ssp, reg_ssp));
+ ? gen_rdsspsi (reg_ssp)
+ : gen_rdsspdi (reg_ssp));
emit_move_insn (mem, reg_ssp);
}
DONE;
reg_ssp = gen_reg_rtx (word_mode);
emit_insn (gen_rtx_SET (reg_ssp, const0_rtx));
emit_insn ((word_mode == SImode)
- ? gen_rdsspsi (reg_ssp, reg_ssp)
- : gen_rdsspdi (reg_ssp, reg_ssp));
+ ? gen_rdsspsi (reg_ssp)
+ : gen_rdsspdi (reg_ssp));
mem_buf = gen_rtx_MEM (word_mode,
plus_constant (Pmode, operands[0],
3 * GET_MODE_SIZE (ptr_mode)));
;; CET instructions
(define_insn "rdssp<mode>"
[(set (match_operand:SWI48x 0 "register_operand" "=r")
- (unspec_volatile:SWI48x
- [(match_operand:SWI48x 1 "register_operand" "0")]
- UNSPECV_NOP_RDSSP))]
+ (unspec_volatile:SWI48x [(const_int 0)] UNSPECV_NOP_RDSSP))]
"TARGET_SHSTK"
- "rdssp<mskmodesuffix>\t%0"
- [(set_attr "length" "4")
+ "xor{l}\t%k0, %k0\n\trdssp<mskmodesuffix>\t%0"
+ [(set_attr "length" "6")
(set_attr "type" "other")])
(define_insn "incssp<mode>"
* TILEPro Built-in Functions::
* x86 Built-in Functions::
* x86 transactional memory intrinsics::
+* x86 control-flow protection intrinsics::
@end menu
@node AArch64 Built-in Functions
unsigned int __builtin_ia32_rdpkru ()
@end smallexample
-The following built-in functions are available when @option{-mcet} is used.
-They are used to support Intel Control-flow Enforcment Technology (CET).
-Each built-in function generates the machine instruction that is part of the
-function's name.
+The following built-in functions are available when @option{-mcet} or
+@option{-mshstk} option is used. They support shadow stack
+machine instructions from Intel Control-flow Enforcement Technology (CET).
+Each built-in function generates the machine instruction that is part
+of the function's name. These are the internal low-level functions.
+Normally the functions in @ref{x86 control-flow protection intrinsics}
+should be used instead.
+
@smallexample
-unsigned int __builtin_ia32_rdsspd (unsigned int)
-unsigned long long __builtin_ia32_rdsspq (unsigned long long)
+unsigned int __builtin_ia32_rdsspd (void)
+unsigned long long __builtin_ia32_rdsspq (void)
void __builtin_ia32_incsspd (unsigned int)
void __builtin_ia32_incsspq (unsigned long long)
void __builtin_ia32_saveprevssp(void);
Note that, in most cases, the transactional and non-transactional code
must synchronize together to ensure consistency.
+@node x86 control-flow protection intrinsics
+@subsection x86 Control-Flow Protection Intrinsics
+
+@deftypefn {CET Function} {ret_type} _get_ssp (void)
+Get the current value of shadow stack pointer if shadow stack support
+from Intel CET is enabled in the hardware or @code{0} otherwise.
+The @code{ret_type} is @code{unsigned long long} for 64-bit targets
+and @code{unsigned int} for 32-bit targets.
+@end deftypefn
+
+@deftypefn {CET Function} void _inc_ssp (unsigned int)
+Increment the current shadow stack pointer by the size specified by the
+function argument. The argument is masked to a byte value for security
+reasons, so to increment by more than 255 bytes you must call the function
+multiple times.
+@end deftypefn
+
+The shadow stack unwind code looks like:
+
+@smallexample
+#include <immintrin.h>
+
+/* Unwind the shadow stack for EH. */
+#define _Unwind_Frames_Extra(x) \
+ do \
+ @{ \
+ _Unwind_Word ssp = _get_ssp (); \
+ if (ssp != 0) \
+ @{ \
+ _Unwind_Word tmp = (x); \
+ while (tmp > 255) \
+ @{ \
+ _inc_ssp (tmp); \
+ tmp -= 255; \
+ @} \
+ _inc_ssp (tmp); \
+ @} \
+ @} \
+ while (0)
+@end smallexample
+
+@noindent
+This code runs unconditionally on all 64-bit processors. For 32-bit
+processors the code runs on those that support multi-byte NOP instructions.
+
@node Target Format Checks
@section Format Checks Specific to Particular Target Machines
+2018-02-14 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
+ PR target/84239
+ * gcc.target/i386/cet-intrin-3.c: Use new _get_ssp and
+ _inc_ssp intrinsics.
+ * gcc.target/i386/cet-intrin-4.c: Likewise.
+ * gcc.target/i386/cet-rdssp-1.c: Remove argument from
+ __builtin_ia32_rdssp[d|q].
+
2018-02-14 Richard Sandiford <richard.sandiford@linaro.org>
PR tree-optimization/84357
unsigned int f1 ()
{
- unsigned int x = 0;
- return _rdsspd (x);
+ return _get_ssp ();
}
void f3 (unsigned int _a)
{
- _incsspd (_a);
+ _inc_ssp (_a);
}
#ifdef __x86_64__
unsigned long long f2 ()
{
- unsigned long long x = 0;
- return _rdsspq (x);
+ return _get_ssp ();
}
void f4 (unsigned int _a)
{
- _incsspq (_a);
+ _inc_ssp (_a);
}
#endif
/* { dg-final { scan-assembler "incssp\[dq]\[ \t]+(%|)\[re]di" { target { ! ia32 } } } } */
#include <immintrin.h>
-
-unsigned int f1 ()
-{
- unsigned int x = 0;
- return _rdsspd (x);
-}
-
-void f3 (unsigned int _a)
-{
- _incsspd (_a);
-}
-
-#ifdef __x86_64__
-unsigned long long f2 ()
-{
- unsigned long long x = 0;
- return _rdsspq (x);
-}
-
-void f4 (unsigned int _a)
-{
- _incsspq (_a);
-}
-#endif
+#include "cet-intrin-3.c"
#ifdef __x86_64__
# define incssp(x) __builtin_ia32_incsspq (x)
-# define rdssp(x) __builtin_ia32_rdsspq (x)
+# define rdssp() __builtin_ia32_rdsspq ()
#else
# define incssp(x) __builtin_ia32_incsspd (x)
-# define rdssp(x) __builtin_ia32_rdsspd (x)
+# define rdssp() __builtin_ia32_rdsspd ()
#endif
static void
__attribute__ ((noinline, noclone))
test (unsigned long frames)
{
- unsigned long ssp = 0;
- ssp = rdssp (ssp);
+ unsigned long ssp;
+ ssp = rdssp ();
if (ssp != 0)
{
unsigned long tmp = frames;
+2018-02-08 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
+ PR target/84239
+ * config/i386/shadow-stack-unwind.hi (_Unwind_Frames_Extra):
+ Use new _get_ssp and _inc_ssp intrinsics.
+
2018-02-02 Julia Koval <julia.koval@intel.com>
* config/i386/cpuinfo.h (processor_subtypes): Add INTEL_COREI7_ICELAKE.
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
-#ifdef __x86_64__
-# define incssp(x) __builtin_ia32_incsspq ((x))
-# define rdssp(x) __builtin_ia32_rdsspq (x)
-#else
-# define incssp(x) __builtin_ia32_incsspd ((x))
-# define rdssp(x) __builtin_ia32_rdsspd (x)
-#endif
+#include <x86intrin.h>
/* Unwind the shadow stack for EH. */
#undef _Unwind_Frames_Extra
#define _Unwind_Frames_Extra(x) \
do \
{ \
- unsigned long ssp = 0; \
- ssp = rdssp (ssp); \
+ _Unwind_Word ssp = _get_ssp (); \
if (ssp != 0) \
{ \
- unsigned long tmp = (x); \
+ _Unwind_Word tmp = (x); \
while (tmp > 255) \
{ \
- incssp (tmp); \
+ _inc_ssp (tmp); \
tmp -= 255; \
} \
- incssp (tmp); \
+ _inc_ssp (tmp); \
} \
} \
while (0)
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