}
inline bool
- need_stage(int vc, VC_state_type state, flit_stage stage, Cycles curTime)
+ need_stage(int vc, VC_state_type state, flit_stage stage, Cycles cTime)
{
- return m_vcs[vc]->need_stage(state, stage, curTime);
- }
-
- inline bool
- need_stage_nextcycle(int vc, VC_state_type state, flit_stage stage,
- Cycles curTime)
- {
- return m_vcs[vc]->need_stage_nextcycle(state, stage, curTime);
+ return m_vcs[vc]->need_stage(state, stage, cTime);
}
inline bool
}
}
for (int vc = 0; vc < m_num_vcs; vc++) {
- if (m_ni_buffers[vc]->isReadyForNext(m_net_ptr->curCycle())) {
+ if (m_ni_buffers[vc]->isReady(m_net_ptr->curCycle() + Cycles(1))) {
scheduleEvent(Cycles(1));
return;
}
void
SWallocator_d::check_for_wakeup()
{
+ Cycles nextCycle = m_router->curCycle() + Cycles(1);
+
for (int i = 0; i < m_num_inports; i++) {
for (int j = 0; j < m_num_vcs; j++) {
- if (m_input_unit[i]->need_stage_nextcycle(j, ACTIVE_, SA_,
- m_router->curCycle())) {
+ if (m_input_unit[i]->need_stage(j, ACTIVE_, SA_, nextCycle)) {
scheduleEvent(Cycles(1));
return;
}
void
Switch_d::check_for_wakeup()
{
+ Cycles nextCycle = m_router->curCycle() + Cycles(1);
+
for (int inport = 0; inport < m_num_inports; inport++) {
- if (m_switch_buffer[inport]->isReadyForNext(m_router->curCycle())) {
+ if (m_switch_buffer[inport]->isReady(nextCycle)) {
scheduleEvent(Cycles(1));
break;
}
void
VCallocator_d::check_for_wakeup()
{
+ Cycles nextCycle = m_router->curCycle() + Cycles(1);
+
for (int i = 0; i < m_num_inports; i++) {
for (int j = 0; j < m_num_vcs; j++) {
- if (m_input_unit[i]->need_stage_nextcycle(j, VC_AB_, VA_,
- m_router->curCycle())) {
+ if (m_input_unit[i]->need_stage(j, VC_AB_, VA_, nextCycle)) {
scheduleEvent(Cycles(1));
return;
}
bool
VirtualChannel_d::need_stage(VC_state_type state, flit_stage stage,
- Cycles curTime)
+ Cycles ct)
{
- if ((m_vc_state.first == state) && (curTime >= m_vc_state.second)) {
- if (m_input_buffer->isReady(curTime)) {
+ if ((m_vc_state.first == state) && (ct >= m_vc_state.second)) {
+ if (m_input_buffer->isReady(ct)) {
flit_d *t_flit = m_input_buffer->peekTopFlit();
- return(t_flit->is_stage(stage, curTime)) ;
- }
- }
- return false;
-}
-
-bool
-VirtualChannel_d::need_stage_nextcycle(VC_state_type state, flit_stage stage,
- Cycles curTime)
-{
- if ((m_vc_state.first == state) && ((curTime + 1) >= m_vc_state.second)) {
- if (m_input_buffer->isReadyForNext(curTime)) {
- flit_d *t_flit = m_input_buffer->peekTopFlit();
- return(t_flit->is_next_stage(stage, curTime)) ;
+ return(t_flit->is_stage(stage, ct)) ;
}
}
return false;
~VirtualChannel_d();
bool need_stage(VC_state_type state, flit_stage stage, Cycles curTime);
- bool need_stage_nextcycle(VC_state_type state, flit_stage stage,
- Cycles curTime);
void set_outport(int outport);
void grant_vc(int out_vc, Cycles curTime);
return false;
}
-bool
-flitBuffer_d::isReadyForNext(Cycles curTime)
-{
- if (m_buffer.size() != 0 ) {
- flit_d *t_flit = peekTopFlit();
- if (t_flit->get_time() <= (curTime + 1))
- return true;
- }
- return false;
-}
-
void
flitBuffer_d::print(std::ostream& out) const
{
flitBuffer_d(int maximum_size);
bool isReady(Cycles curTime);
- bool isReadyForNext(Cycles curTime);
bool isEmpty();
void print(std::ostream& out) const;
bool isFull();
curTime >= m_stage.second);
}
- bool
- is_next_stage(flit_stage t_stage, Cycles curTime)
- {
- return (m_stage.first == t_stage &&
- (curTime + 1) >= m_stage.second);
- }
-
void
advance_stage(flit_stage t_stage, Cycles curTime)
{