Added roadmap to readme file
authorClifford Wolf <clifford@clifford.at>
Sat, 2 Nov 2013 12:19:04 +0000 (13:19 +0100)
committerClifford Wolf <clifford@clifford.at>
Sat, 2 Nov 2013 12:19:04 +0000 (13:19 +0100)
README

diff --git a/README b/README
index 9d48f5d86356435601e38de04583c667caa54382..ef482b0f1b98fb7d6f33acc7d2e8865da1206d8d 100644 (file)
--- a/README
+++ b/README
@@ -280,6 +280,15 @@ and after each occurrence of PRIi64 in the header file:
         sudo sed -i 's/PRIi64/ & /' /usr/include/minisat/utils/Options.h
 
 
+Roadmap / Large-scale TODOs
+===========================
+
+- Technology mapping for real-world applications (specific FPGAs and ASIC processes)
+- Improve standard complience of const folding and parameters (mostly expression widths)
+- Implement SAT-based formal equivialence checker based on existing SAT framework
+- Re-implement Verilog frontend (cleaner AST format, pipeline of well structured AST transformations)
+
+
 TODOs / Open Bugs
 =================