+2006-09-08 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
+
2006-09-07 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (parse_operands): Mark operand as present.
UT(cbnz, b900, 2, (RR, EXP), t_czb),
UT(cbz, b100, 2, (RR, EXP), t_czb),
- /* ARM does not really have an IT instruction. */
+ /* ARM does not really have an IT instruction, so always allow it. */
+#undef ARM_VARIANT
+#define ARM_VARIANT &arm_ext_v1
TUE(it, 0, bf08, 1, (COND), it, t_it),
TUE(itt, 0, bf0c, 1, (COND), it, t_it),
TUE(ite, 0, bf04, 1, (COND), it, t_it),
+2006-09-08 Paul Brook <paul@codesourcery.com>
+
+ * gas/arm/arm-it.s: New test.
+ * gas/arm/arm-it.d: New test.
+
2006-09-07 Paul Brook <paul@codesourcery.com>
* gas/arm/neon-omit.s: Test three-argument variants.
--- /dev/null
+#name: ARM IT instruction
+#objdump: -dr --prefix-addresses --show-raw-insn
+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+000 <[^>]*> 03a00000 ? moveq r0, #0 ; 0x0
+0+004 <[^>]*> e1a0f00e ? mov pc, lr