2006-09-08 Paul Brook <paul@codesourcery.com>
authorPaul Brook <paul@codesourcery.com>
Fri, 8 Sep 2006 15:51:02 +0000 (15:51 +0000)
committerPaul Brook <paul@codesourcery.com>
Fri, 8 Sep 2006 15:51:02 +0000 (15:51 +0000)
gas/
* config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.

gas/testsuite/
* gas/arm/arm-it.s: New test.
* gas/arm/arm-it.d: New test.

gas/ChangeLog
gas/config/tc-arm.c
gas/testsuite/ChangeLog
gas/testsuite/gas/arm/arm-it.d [new file with mode: 0644]
gas/testsuite/gas/arm/arm-it.s [new file with mode: 0644]

index beaf18b1cfb13ccdf352db34d2c5af9e0b6e971a..b5dd1723aa63bd960df0edf6a94472d9d1503b7c 100644 (file)
@@ -1,3 +1,7 @@
+2006-09-08  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
+
 2006-09-07  Paul Brook  <paul@codesourcery.com>
 
        * config/tc-arm.c (parse_operands): Mark operand as present.
index 8388379ce1afa332f2fcc90eea715d46f6950365..a6f8b6bd3fae112adb0a429c7fa7c5cad51b15e7 100644 (file)
@@ -14828,7 +14828,9 @@ static const struct asm_opcode insns[] =
 
   UT(cbnz,      b900,    2, (RR, EXP), t_czb),
   UT(cbz,       b100,    2, (RR, EXP), t_czb),
- /* ARM does not really have an IT instruction.  */
+ /* ARM does not really have an IT instruction, so always allow it.  */
+#undef ARM_VARIANT
+#define ARM_VARIANT &arm_ext_v1
  TUE(it,        0, bf08, 1, (COND),    it, t_it),
  TUE(itt,       0, bf0c, 1, (COND),    it, t_it),
  TUE(ite,       0, bf04, 1, (COND),    it, t_it),
index 7dcdabd606c1e372b4840ed3ff59a0620122bfc9..4533f54408841931229897d5ffb5f10ad5138b6b 100644 (file)
@@ -1,3 +1,8 @@
+2006-09-08  Paul Brook  <paul@codesourcery.com>
+
+       * gas/arm/arm-it.s: New test.
+       * gas/arm/arm-it.d: New test.
+
 2006-09-07  Paul Brook  <paul@codesourcery.com>
 
        * gas/arm/neon-omit.s: Test three-argument variants.
diff --git a/gas/testsuite/gas/arm/arm-it.d b/gas/testsuite/gas/arm/arm-it.d
new file mode 100644 (file)
index 0000000..674f815
--- /dev/null
@@ -0,0 +1,9 @@
+#name: ARM IT instruction
+#objdump: -dr --prefix-addresses --show-raw-insn
+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+000 <[^>]*> 03a00000 ?       moveq   r0, #0  ; 0x0
+0+004 <[^>]*> e1a0f00e ?       mov     pc, lr
diff --git a/gas/testsuite/gas/arm/arm-it.s b/gas/testsuite/gas/arm/arm-it.s
new file mode 100644 (file)
index 0000000..f3c56e8
--- /dev/null
@@ -0,0 +1,8 @@
+       # Check that IT is accepted in ARM mode on older architectures
+       .text
+       .syntax unified
+       .arch armv4
+label1:
+       it      eq
+       moveq   r0, #0
+       mov     pc, lr