byte-ordered SRAM with elements to be accessed as if in a Little-Endian
Software Environment. This does **not** impact Memory-ordering in any way
and it does **not** impact arithmetic operations.
+
"Architecturally" is defined by Industry-standard convention to mean
that how the Hardware is implemented is entirely down to the implementor,
but that as far as *software* running on that hardware is concerned,
-"Architecturally" everything appears as described.
+"Architecturally" everything appears as described. Mathematics would
+describe any given implementation and an Architecturally
+correctly-defined specification as Topologically "Homeomorphic".
In other words once loaded, software may be written that
considers arithmetic values in a uniform environment regardless
or using Matrix REMAP with Dimensional Inversion, or any number of
methods.
-In the overview page is this:
+In the overview page, where bytes are numbered in LSB0 order left
+to right, is this:
| byte0 | byte1 | byte2 | byte3 | byte4 | byte5 | byte6 | byte7 |
| ----- | ----- | ----- | ----- | ----- | ----- | ----- | ----- |