Fix adddi3.

From-SVN: r8352

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 38467460ff4b9905ee4f580c55739a0a0cced13c..89dca03941623447f53dd0b737718fa1e1709f0a 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2343,19 +2343,25 @@
 ;;- add instructions
 
 (define_insn "adddi3"
-  [(set (match_operand:DI 0 "general_operand" "=&r,ro,o,&r,o,o,o")
-       (plus:DI (match_operand:DI 1 "general_operand" "%0,0,0,or,riF,riF,o")
-                (match_operand:DI 2 "general_operand" "o,riF,o,oriF,riF,o,o")))
-   (clobber (match_scratch:SI 3 "=X,X,&r,X,X,&r,&r"))]
+  [(set (match_operand:DI 0 "general_operand" "=&r,ro,o,&r,ro,o,&r,o,o,o")
+       (plus:DI (match_operand:DI 1 "general_operand" "%0,0,0,o,riF,o,or,riF,riF,o")
+                (match_operand:DI 2 "general_operand" "o,riF,o,0,0,0,oriF,riF,o,o")))
+   (clobber (match_scratch:SI 3 "=X,X,&r,X,X,&r,X,X,&r,&r"))]
   ""
   "*
 {
-  rtx low[3], high[3], xops[7];
+  rtx low[3], high[3], xops[7], temp;
 
   CC_STATUS_INIT;
 
-  split_di (operands, 3, low, high);
+  if (rtx_equal_p (operands[0], operands[2]))
+    {
+      temp = operands[1];
+      operands[1] = operands[2];
+      operands[2] = temp;
+    }
 
+  split_di (operands, 3, low, high);
   if (!rtx_equal_p (operands[0], operands[1]))
     {
       xops[0] = high[0];
@@ -2383,7 +2389,7 @@
        }
     }
 
-  if (GET_CODE (operands[3]) == REG)
+  if (GET_CODE (operands[3]) == REG && GET_CODE (operands[2]) != REG)
     {
       xops[0] = high[0];
       xops[1] = low[0];