arm, power: Make the python TLB simobjects inherit from BaseTLB.

These were still inheriting from SimObject instead of BaseTLB, making
them incompatible with parameters which expect a BaseTLB.

Change-Id: I05115cc5515f745fdeb85e4dea8eded613647e40
Reviewed-on: https://gem5-review.googlesource.com/7348
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

diff --git a/src/arch/arm/ArmTLB.py b/src/arch/arm/ArmTLB.py
index b3f711d831c9ff76e549194360d55675424d86f7..4cac944f18894f6337398e862f213c7e3cdd13a5 100644 (file)
--- a/src/arch/arm/ArmTLB.py
+++ b/src/arch/arm/ArmTLB.py
@@ -41,6 +41,7 @@ from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
 from MemObject import MemObject
+from BaseTLB import BaseTLB
 
 # Basic stage 1 translation objects
 class ArmTableWalker(MemObject):
@@ -59,7 +60,7 @@ class ArmTableWalker(MemObject):
 
     sys = Param.System(Parent.any, "system object parameter")
 
-class ArmTLB(SimObject):
+class ArmTLB(BaseTLB):
     type = 'ArmTLB'
     cxx_class = 'ArmISA::TLB'
     cxx_header = "arch/arm/tlb.hh"

diff --git a/src/arch/power/PowerTLB.py b/src/arch/power/PowerTLB.py
index ae6503a1f16558d266b58027f40195b2621e691d..b12c5a8e3c5cf88c9395574c7e8f174da2acb110 100644 (file)
--- a/src/arch/power/PowerTLB.py
+++ b/src/arch/power/PowerTLB.py
@@ -31,7 +31,9 @@
 from m5.SimObject import SimObject
 from m5.params import *
 
-class PowerTLB(SimObject):
+from BaseTLB import BaseTLB
+
+class PowerTLB(BaseTLB):
     type = 'PowerTLB'
     cxx_class = 'PowerISA::TLB'
     cxx_header = 'arch/power/tlb.hh'