arch-x86: Fix FLDCW_P and FNSTCW_P to use rip.

FLDCW_P and FNSTCW_P should use rip to compute address.

Change-Id: Ide7327e243d42bdd8791e43773385b2a79d45418
Signed-off-by: Zhengrong Wang <seanzw@ucla.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22483
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/x86/isa/insts/x87/control/save_and_restore_x87_control_word.py b/src/arch/x86/isa/insts/x87/control/save_and_restore_x87_control_word.py
index af465f014a600498fafa45342c564c72fe06fbcf..1d2c4ba6add39d1686150497982dc80f9d3d0d12 100644 (file)
--- a/src/arch/x86/isa/insts/x87/control/save_and_restore_x87_control_word.py
+++ b/src/arch/x86/isa/insts/x87/control/save_and_restore_x87_control_word.py
@@ -43,7 +43,7 @@ def macroop FLDCW_M {
 };
 
 def macroop FLDCW_P {
-    ld t1, seg, sib, disp, dataSize=2
+    ld t1, seg, riprel, disp, dataSize=2
     wrval fcw, t1
 };
 
@@ -57,6 +57,6 @@ def macroop FNSTCW_M {
 def macroop FNSTCW_P {
     rdip t7
     rdval t1, fcw
-    st t1, seg, sib, disp, dataSize=2
+    st t1, seg, riprel, disp, dataSize=2
 };
 '''