verific - import attributes for net buses as well

diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index 1630c57bca91760e7032907d6381cebfcb754ab2..89d734c40453b932fc51673a0fcaedd7a005e6d3 100644 (file)
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -1109,7 +1109,10 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::se
 
                        RTLIL::Wire *wire = module->addWire(wire_name, netbus->Size());
                        wire->start_offset = min(netbus->LeftIndex(), netbus->RightIndex());
-                       import_attributes(wire->attributes, netbus, nl);
+                       MapIter mibus;
+                       FOREACH_NET_OF_NETBUS(netbus, mibus, net) {
+                               import_attributes(wire->attributes, net, nl);
+                       }
 
                        RTLIL::Const initval = Const(State::Sx, GetSize(wire));
                        bool initval_valid = false;