Temporary fix for ll/sc bug see flyspray task for more info:

http://www.m5sim.org/flyspray/task/197

Signed-off by: Ali Saidi <saidi@eecs.umich.edu>

--HG--
extra : convert_revision : cdeece7e3163de9abf2c6c7435f1bc93570fab81

diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index ed65fbabb06573d0864756fb7f29dcfcb7e58d64..7a06f9fc7c49fa045250bf3f0b435b332aa40128 100644 (file)
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -171,8 +171,8 @@ Cache<TagStore>::satisfyCpuSideRequest(PacketPtr pkt, BlkType *blk)
     if (pkt->cmd == MemCmd::SwapReq) {
         cmpAndSwap(blk, pkt);
     } else if (pkt->isWrite()) {
+        blk->status |= BlkDirty;
         if (blk->checkWrite(pkt)) {
-            blk->status |= BlkDirty;
             pkt->writeDataToBlock(blk->data, blkSize);
         }
     } else if (pkt->isRead()) {