update pinset for hyperram resource

diff --git a/HDL_workflow/HyperRAM.mdwn b/HDL_workflow/HyperRAM.mdwn
index 9a96a70d3f533bf199eb0f3799b18ccb0b68de9e..8fcd25499617f3392ba978a8e6f394a9e7092ccf 100644 (file)
--- a/HDL_workflow/HyperRAM.mdwn
+++ b/HDL_workflow/HyperRAM.mdwn
@@ -4,9 +4,10 @@
 
 ```
 from nmigen.resources.memory import HyperRAMResources
-hyperram_ios = HyperRAMResources(cs_n="B1",
-                                 dq="D0 D1 D2 D3 D4 D7 D6 D7",
-                                 rwds="B2", rst_n="B3", clk_p="B4",
+hyperram_ios = HyperRAMResources(cs_n="B13 C13 A12 A13",
+                                 dq="E14 C11 B10 E12 D12 A9 D11 D14",
+                                 rwds="C14", rst_n="E13", clk_p="D13",
+                                 clk_n="A14", # only in DDR mode
                                                                 attrs=IOStandard("LVCMOS33"))
 self.platform.add_extension(hyperram_ios)
 io = self.platform.request("hyperram")