radeon/uvd: move alignment to winsys
authorChristian König <christian.koenig@amd.com>
Sun, 22 Sep 2013 08:41:27 +0000 (10:41 +0200)
committerChristian König <christian.koenig@amd.com>
Wed, 25 Sep 2013 08:58:58 +0000 (10:58 +0200)
Similar to GFX and DMA.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/drivers/radeon/radeon_uvd.c
src/gallium/winsys/radeon/drm/radeon_drm_cs.c

index fa8110541c5e4df5bbc94b135b6b495d75103346..a8b17e6376e27c27e2cba21c0a6431bc64309e33 100644 (file)
@@ -104,12 +104,6 @@ static unsigned alloc_stream_handle()
 /* flush IB to the hardware */
 static void flush(struct ruvd_decoder *dec)
 {
-       uint32_t *pm4 = dec->cs->buf;
-
-       // align IB
-       while(dec->cs->cdw % 16)
-               pm4[dec->cs->cdw++] = RUVD_PKT2();
-
        dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, 0);
 }
 
index d530011be662aa2b1898f8f3b8dcfb8f2b526232..62f77044b3a378cf878deee87f82144bae65a0ae 100644 (file)
@@ -494,6 +494,12 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags, ui
                            OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
            }
            break;
+    case RING_UVD:
+            while (rcs->cdw & 15)
+               OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
+           break;
+    default:
+           break;
     }
 
     if (rcs->cdw > RADEON_MAX_CMDBUF_DWORDS) {