radeonsi: add support for SQRT

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>

diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
index 80267233959cce350cd029217098c03ae83dd46d..385d3ada9d0a4614d5b7051190beec94934c6957 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
+++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
@@ -1363,6 +1363,8 @@ void radeon_llvm_context_init(struct radeon_llvm_context * ctx)
        bld_base->op_actions[TGSI_OPCODE_SGT].emit = emit_cmp;
        bld_base->op_actions[TGSI_OPCODE_SIN].emit = build_tgsi_intrinsic_nomem;
        bld_base->op_actions[TGSI_OPCODE_SIN].intr_name = "llvm.sin.f32";
+       bld_base->op_actions[TGSI_OPCODE_SQRT].emit = build_tgsi_intrinsic_nomem;
+       bld_base->op_actions[TGSI_OPCODE_SQRT].intr_name = "llvm.sqrt.f32";
        bld_base->op_actions[TGSI_OPCODE_SSG].emit = emit_ssg;
        bld_base->op_actions[TGSI_OPCODE_TEX].fetch_args = tex_fetch_args;
        bld_base->op_actions[TGSI_OPCODE_TEX].intr_name = "llvm.AMDGPU.tex";

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 87eeac6fbe8c89def8c65ccdb90444b99cd126e2..993b153d1f48f55ffe18f2eee79a94ffb10a8cb5 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -403,7 +403,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
        case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
                return 1;
        case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
-               return 0;
+               return 1;
        case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
                /* Indirection of geometry shader input dimension is not
                 * handled yet