radv/gfx10: always set ballot_mask_bits to 64

The codegen handles it and it adds the correct casts. This fixes
a bunch of LLVM validation errors when enabling Wave32 for compute.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 047a77d6c9658e8f6396483c6fae19f77ad1bf40..27567317c8c7eaaa0adc8fd3ad29ed82161bfee6 100644 (file)
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -4185,8 +4185,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
                                       AC_FLOAT_MODE_DEFAULT;
 
        ac_llvm_context_init(&ctx.ac, ac_llvm, options->chip_class,
-                            options->family, float_mode, options->wave_size,
-                            options->wave_size);
+                            options->family, float_mode, options->wave_size, 64);
        ctx.context = ctx.ac.context;
 
        radv_nir_shader_info_init(&shader_info->info);