gcc/
PR target/68772
* config/rs6000/rs6000.h (ASM_CPU_SPEC): For -mcpu=powerpc64le,
pass %(asm_cpu_power8)/-mpwr8.
* config/rs6000/aix53.h: Likewise.
* config/rs6000/aix61.h: Likewise.
* config/rs6000/aix71.h: Likewise.
gcc/testsuite/
PR target/68772
* gcc.target/powerpc/pr68872.c: New test.
From-SVN: r231905
+2015-12-22 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR target/68772
+ * config/rs6000/rs6000.h (ASM_CPU_SPEC): For -mcpu=powerpc64le,
+ pass %(asm_cpu_power8)/-mpwr8.
+ * config/rs6000/aix53.h: Likewise.
+ * config/rs6000/aix61.h: Likewise.
+ * config/rs6000/aix71.h: Likewise.
+
2015-12-22 H.J. Lu <hongjiu.lu@intel.com>
PR target/68937
%{mcpu=power9: %(asm_cpu_power9)} \
%{mcpu=a2: -ma2} \
%{mcpu=powerpc: -mppc} \
+%{mcpu=powerpc64le: %(asm_cpu_power8)} \
%{mcpu=rs64a: -mppc64} \
%{mcpu=401: -mppc} \
%{mcpu=403: -m403} \
+2015-12-22 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR target/68772
+ * gcc.target/powerpc/pr68872.c: New test.
+
2015-12-22 H.J. Lu <hongjiu.lu@intel.com>
PR target/68937
--- /dev/null
+/* PR target/68872 */
+/* { dg-do assemble { target { powerpc64le-*-* } } } */
+/* { dg-options "-mcpu=powerpc64le" } */
+
+/* Verify that -mcpu=powerpc64le passes -mpower8 to the assembler. */
+
+long
+bar (unsigned char *ptr, unsigned char val)
+{
+ long ret;
+ asm volatile ("stbcx. %0,0,%1" :: "r" (val), "r" (ptr));
+ asm volatile ("mfcr %0,8" : "=r" (ret) ::);
+ return ret;
+}