BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDIL::COPY))
.addOperand(MI->getOperand(0))
.addReg(ConstantReg);
- MI->eraseFromParent();
break;
}
int64_t RegIndex = MI->getOperand(1).getImm();
addLiveIn(MI, MF, MRI, TII,
AMDIL::R600_TReg32RegClass.getRegister(RegIndex));
- MI->eraseFromParent();
break;
}
case AMDIL::STORE_OUTPUT:
if (!MRI.isLiveOut(OutputReg)) {
MRI.addLiveOut(OutputReg);
}
- MI->eraseFromParent();
break;
}
unsigned ReservedReg =
AMDIL::R600_TReg32RegClass.getRegister(ReservedIndex);
MFI->ReservedRegs.push_back(ReservedReg);
- MI->eraseFromParent();
break;
}
}
+ MI->eraseFromParent();
return BB;
}