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aarch64: Do not alter force_reg returned register expanding fcmla
author
Andrea Corallo
<andrea.corallo@arm.com>
Fri, 6 Nov 2020 16:17:32 +0000
(16:17 +0000)
committer
Andrea Corallo
<andrea.corallo@arm.com>
Mon, 9 Nov 2020 14:39:07 +0000
(15:39 +0100)
2020-11-06 Andrea Corallo <andrea.corallo@arm.com>
* config/aarch64/aarch64-builtins.c
(aarch64_expand_fcmla_builtin): Do not alter force_reg returned
register.
gcc/config/aarch64/aarch64-builtins.c
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diff --git
a/gcc/config/aarch64/aarch64-builtins.c
b/gcc/config/aarch64/aarch64-builtins.c
index 5defdb050fa4210f4031244eb307df5770a4d57b..188fce0589272cbb81a6eba9a49e5470a3d968f6 100644
(file)
--- a/
gcc/config/aarch64/aarch64-builtins.c
+++ b/
gcc/config/aarch64/aarch64-builtins.c
@@
-1862,10
+1862,10
@@
aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
only need to know the order in a V2mode. */
lane_idx = aarch64_endian_lane_rtx (V2DImode, lane);
- if (!target)
+ if (!target
+ || !REG_P (target)
+ || GET_MODE (target) != d->mode)
target = gen_reg_rtx (d->mode);
- else
- target = force_reg (d->mode, target);
rtx pat = NULL_RTX;