i965: Add support for emitting and disassembling bit instructions.

Specifically
   bfe - for bitfieldExtract()
   bfi1 and bfi2 - for bitfieldInsert()
   bfrev - for bitfieldReverse()
   cbit - for bitCount()
   fbh - for findMSB()
   fbl - for findLSB()

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index b00752021718dcd763b0d2971f2b4d493625957f..e37805d4ad66638cd63c0992d43016a36b07c313 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -647,6 +647,10 @@ enum opcode {
    BRW_OPCODE_CMPN =   17,
    BRW_OPCODE_F32TO16 = 19,
    BRW_OPCODE_F16TO32 = 20,
+   BRW_OPCODE_BFREV =  23,
+   BRW_OPCODE_BFE =    24,
+   BRW_OPCODE_BFI1 =   25,
+   BRW_OPCODE_BFI2 =   26,
    BRW_OPCODE_JMPI =   32,
    BRW_OPCODE_IF =     34,
    BRW_OPCODE_IFF =    35,
@@ -676,6 +680,9 @@ enum opcode {
    BRW_OPCODE_MAC =    72,
    BRW_OPCODE_MACH =   73,
    BRW_OPCODE_LZD =    74,
+   BRW_OPCODE_FBH =    75,
+   BRW_OPCODE_FBL =    76,
+   BRW_OPCODE_CBIT =   77,
    BRW_OPCODE_SAD2 =   80,
    BRW_OPCODE_SADA2 =  81,
    BRW_OPCODE_DP4 =    84,

diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 3e7c613eb05ad51b2a3cc1da2441a92f0e18b606..18e6c9d78fc0ecf481aa4489ddf9ab23e942ea9e 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -43,6 +43,10 @@ const struct opcode_desc opcode_descs[128] = {
     [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
     [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 },
     [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 },
+    [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1},
+    [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1},
+    [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1},
+    [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1},
 
     [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
     [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
@@ -70,6 +74,9 @@ const struct opcode_desc opcode_descs[128] = {
     [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
     [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
     [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
+    [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1},
+    [BRW_OPCODE_BFI1] = { .name = "bfe1", .nsrc = 2, .ndst = 1},
+    [BRW_OPCODE_BFI2] = { .name = "bfe2", .nsrc = 3, .ndst = 1},
 
     [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
     [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },

diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 9683b1314da21bfaaafccf6509a32cf9145ffaf2..ce8843d8a6e9490f5181cdad6e92e33118d6bbdb 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -176,6 +176,13 @@ ALU2(LINE)
 ALU2(PLN)
 ALU3(MAD)
 ALU3(LRP)
+ALU1(BFREV)
+ALU3(BFE)
+ALU2(BFI1)
+ALU3(BFI2)
+ALU1(FBH)
+ALU1(FBL)
+ALU1(CBIT)
 
 ROUND(RNDZ)
 ROUND(RNDE)

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index bd02270a173926decacc825daf8e762d958b7ead..31d97ca5c283f52c5a4c27289401275045f1b256 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -957,6 +957,13 @@ ALU2(LINE)
 ALU2(PLN)
 ALU3(MAD)
 ALU3(LRP)
+ALU1(BFREV)
+ALU3(BFE)
+ALU2(BFI1)
+ALU3(BFI2)
+ALU1(FBH)
+ALU1(FBL)
+ALU1(CBIT)
 
 ROUND(RNDZ)
 ROUND(RNDE)