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diff --git a/openpower/sv/svp64_quirks.mdwn b/openpower/sv/svp64_quirks.mdwn
index 664357eefdcec2b2f7024241961ad7d25b1fe8e3..e46e3feb33a1a3f03bcaa64775e91ba03a9422bf 100644 (file)
--- a/openpower/sv/svp64_quirks.mdwn
+++ b/openpower/sv/svp64_quirks.mdwn
@@ -2,7 +2,7 @@
 
 [[!toc]]
 
-SVP64 is designed around these fundamental and inviolate principles:
+SVP64 is designed around these fundamental and inviolate RISC principles:
 
 1. There are no actual Vector instructions: Scalar instructions
    are the sole exclusive bedrock.
@@ -61,6 +61,8 @@ also having it as a Scalar un-prefixed instruction is that if the
 then how can a Vectorised version of that new instruction ever be added?
 Bottom line here is that the fundamental RISC Principle is strictly adhered
 to, even though these are Advanced 64-bit Vector instructions.
+Advocates of the RISC Principle will appreciate the uniformity of
+SVP64 and the level of systematic abstraction kept between Prefix and Suffix.
 
 # Instruction Groups