tools: remove vexriscv_debug
authorSean Cross <sean@xobs.io>
Fri, 27 Jul 2018 07:21:19 +0000 (15:21 +0800)
committerSean Cross <sean@xobs.io>
Fri, 27 Jul 2018 07:25:33 +0000 (15:25 +0800)
This program is no longer needed.

The `openocd_vexriscv` package natively supports `etherbone`, and now
that the vexriscv debug module is available on Wishbone instead of as a
CSR, this module no longer works.

This change simplifies both tooling (because there is one fewer program
to run) and integration (because you don't need to modify your CSRs
anymore, just `register_mem()`.)

Signed-off-by: Sean Cross <sean@xobs.io>
litex/soc/tools/vexriscv_debug.py [deleted file]
setup.py

diff --git a/litex/soc/tools/vexriscv_debug.py b/litex/soc/tools/vexriscv_debug.py
deleted file mode 100644 (file)
index 1127686..0000000
+++ /dev/null
@@ -1,108 +0,0 @@
-#!/usr/bin/env python3\r
-\r
-import sys\r
-import os\r
-import time\r
-import threading\r
-import argparse\r
-import socket\r
-import struct\r
-from litex.soc.tools.remote import RemoteClient\r
-\r
-class ConnectionClosed(Exception):\r
-    pass\r
-\r
-# struct vexriscv_req {\r
-#      uint8_t readwrite;\r
-#      uint8_t size;\r
-#      uint32_t address;\r
-#      uint32_t data;\r
-#} __attribute__((packed));\r
-class VexRiscvDebugPacket():\r
-    def __init__(self, data):\r
-        self.is_write, self.size, self.address, self.value = struct.unpack("=?BII", data)\r
-\r
-class VexRiscvDebugBridge():\r
-    def __init__(self):\r
-        self._get_args()\r
-\r
-    def open(self):\r
-        if not hasattr(self, "debugger_socket"):\r
-            self.debugger_socket = socket.socket(socket.AF_INET, socket.SOCK_STREAM)\r
-            self.debugger_socket.bind(('',7893))\r
-            self.debugger_socket.listen(0)\r
-\r
-        if not hasattr(self, "rc"):\r
-            self.rc = RemoteClient(csr_csv=self.args.csr)\r
-            self.rc.open()\r
-            self.core_reg = self.rc.regs.cpu_or_bridge_debug_core\r
-            self.data_reg = self.rc.regs.cpu_or_bridge_debug_data\r
-            self.refresh_reg = self.rc.regs.cpu_or_bridge_debug_refresh\r
-\r
-    def _get_args(self):\r
-        parser = argparse.ArgumentParser()\r
-        parser.add_argument("--csr", default="test/csr.csv", help="csr mapping file")\r
-        self.args = parser.parse_args()\r
-\r
-    def accept(self):\r
-        if hasattr(self, "debugger"):\r
-            return\r
-        print("Waiting for connection from debugger...")\r
-        self.debugger, address = self.debugger_socket.accept()\r
-        print("Accepted debugger connection from {}".format(address[0]))\r
-\r
-    def _refresh_reg(self, reg):\r
-        self.refresh_reg.write(reg)\r
-\r
-    def read_core(self):\r
-        self._refresh_reg(0)\r
-        self.write_to_debugger(self.core_reg.read())\r
-\r
-    def read_data(self):\r
-        self._refresh_reg(4)\r
-        self.write_to_debugger(self.data_reg.read())\r
-\r
-    def write_core(self, value):\r
-        self.core_reg.write(value)\r
-\r
-    def write_data(self, value):\r
-        self.data_reg.write(value)\r
-\r
-    def read_from_debugger(self):\r
-        data = self.debugger.recv(10)\r
-        if len(data) != 10:\r
-            self.debugger.close()\r
-            del self.debugger\r
-            raise ConnectionClosed()\r
-        return VexRiscvDebugPacket(data)\r
-\r
-    def write_to_debugger(self, data):\r
-        self.debugger.send(struct.pack("=I", data))\r
-\r
-def main():\r
-    vrvb = VexRiscvDebugBridge()\r
-    vrvb.open()\r
-\r
-    while True:\r
-        vrvb.accept()\r
-        try:\r
-            pkt = vrvb.read_from_debugger()\r
-            if pkt.is_write == True:\r
-                if pkt.address == 0xf00f0000:\r
-                    vrvb.write_core(pkt.value)\r
-                elif pkt.address == 0xf00f0004:\r
-                    vrvb.write_data(pkt.value)\r
-                else:\r
-                    raise "Unrecognized address"\r
-            else:\r
-                if pkt.address == 0xf00f0000:\r
-                    vrvb.read_core()\r
-                elif pkt.address == 0xf00f0004:\r
-                    vrvb.read_data()\r
-                else:\r
-                    raise "Unrecognized address"\r
-        except ConnectionClosed:\r
-            print("Debugger connection closed")\r
-\r
-if __name__ == "__main__":\r
-    main()\r
index e16e193f6e3abea9ca3567cf2c0b6958cf97d4e4..d129bde0df0e2b2f886e46fab67077bcaa75a8fa 100755 (executable)
--- a/setup.py
+++ b/setup.py
@@ -38,8 +38,7 @@ setup(
         "console_scripts": [
             "litex_term=litex.soc.tools.litex_term:main",
             "mkmscimg=litex.soc.tools.mkmscimg:main",
-            "litex_server=litex.soc.tools.remote.litex_server:main",
-            "vexriscv_bridge=litex.soc.tools.vexriscv_debug:main"
+            "litex_server=litex.soc.tools.remote.litex_server:main"
         ],
     },
 )