radv/ac: use shader imsb emission code.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 883656d5cecd7cf313f4e5c51b6b7ed4b29e2b09..d3c02ceb4a4c91c0e19d093264a55558a99906f5 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -930,23 +930,7 @@ static LLVMValueRef emit_find_lsb(struct nir_to_llvm_context *ctx,
 static LLVMValueRef emit_ifind_msb(struct nir_to_llvm_context *ctx,
                                   LLVMValueRef src0)
 {
-       LLVMValueRef msb = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.flbit.i32",
-                                              ctx->i32, &src0, 1,
-                                              AC_FUNC_ATTR_READNONE);
-
-       /* The HW returns the last bit index from MSB, but NIR wants
-        * the index from LSB. Invert it by doing "31 - msb". */
-       msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
-                          msb, "");
-
-       LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
-       LLVMValueRef cond = LLVMBuildOr(ctx->builder,
-                                       LLVMBuildICmp(ctx->builder, LLVMIntEQ,
-                                                     src0, ctx->i32zero, ""),
-                                       LLVMBuildICmp(ctx->builder, LLVMIntEQ,
-                                                     src0, all_ones, ""), "");
-
-       return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
+       return ac_emit_imsb(&ctx->ac, src0, ctx->i32);
 }
 
 static LLVMValueRef emit_ufind_msb(struct nir_to_llvm_context *ctx,