Undo iterator based Module::remove() for cells, as containers will not

invalidate

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index 502b45cfdb691dc88a887ecf39a53d15613c23bc..a09f4a0d1cbfa81cb2edbf69a06f605684b95a63 100644 (file)
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -1592,21 +1592,13 @@ void RTLIL::Module::remove(const pool<RTLIL::Wire*> &wires)
 
 void RTLIL::Module::remove(RTLIL::Cell *cell)
 {
-       auto it = cells_.find(cell->name);
-       log_assert(it != cells_.end());
-       remove(it);
-}
-
-dict<RTLIL::IdString, RTLIL::Cell*>::iterator RTLIL::Module::remove(dict<RTLIL::IdString, RTLIL::Cell*>::iterator it)
-{
-       RTLIL::Cell *cell = it->second;
        while (!cell->connections_.empty())
                cell->unsetPort(cell->connections_.begin()->first);
 
+       log_assert(cells_.count(cell->name) != 0);
        log_assert(refcount_cells_ == 0);
-       it = cells_.erase(it);
+       cells_.erase(cell->name);
        delete cell;
-       return it;
 }
 
 void RTLIL::Module::rename(RTLIL::Wire *wire, RTLIL::IdString new_name)

diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 4a0f8b4f86910b202f3bb564a6b39bafcf9d54f5..f4fcf5dcfb6e2c4fe8928f98c5b93fceb293818a 100644 (file)
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -1040,7 +1040,6 @@ public:
        // Removing wires is expensive. If you have to remove wires, remove them all at once.
        void remove(const pool<RTLIL::Wire*> &wires);
        void remove(RTLIL::Cell *cell);
-       dict<RTLIL::IdString, RTLIL::Cell*>::iterator remove(dict<RTLIL::IdString, RTLIL::Cell*>::iterator it);
 
        void rename(RTLIL::Wire *wire, RTLIL::IdString new_name);
        void rename(RTLIL::Cell *cell, RTLIL::IdString new_name);