sse.md (*vec_concatv4si): Merge from *vec_concatv4si_1 and *vec_concatv4si_1_avx.

	* config/i386/sse.md (*vec_concatv4si): Merge from *vec_concatv4si_1
	and *vec_concatv4si_1_avx.

From-SVN: r173569

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index db6700416d946175109ccdb071c9b0cc43eb6b54..2317fd2f05df86458421970ee66ea51c0fddfec7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2011-05-09  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/sse.md (*vec_concatv4si): Merge from *vec_concatv4si_1
+       and *vec_concatv4si_1_avx.
+
 2011-05-09  Uros Bizjak  <ubizjak@gmail.com>
 
        PR rtl-optimization/48927

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 99dfeab62d93c6aedab95f377c6560133671bf4b..fb5ddb0b8469e58cb90ad0a6e6d5cdddc8ec7066 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6660,31 +6660,22 @@
   [(set_attr "type" "sselog,ssemov,mmxcvt,mmxmov")
    (set_attr "mode" "V4SF,V4SF,DI,DI")])
 
-(define_insn "*vec_concatv4si_1_avx"
-  [(set (match_operand:V4SI 0 "register_operand"       "=x,x")
+(define_insn "*vec_concatv4si"
+  [(set (match_operand:V4SI 0 "register_operand"       "=Y2,x,x,x,x")
        (vec_concat:V4SI
-         (match_operand:V2SI 1 "register_operand"     " x,x")
-         (match_operand:V2SI 2 "nonimmediate_operand" " x,m")))]
-  "TARGET_AVX"
-  "@
-   vpunpcklqdq\t{%2, %1, %0|%0, %1, %2}
-   vmovhps\t{%2, %1, %0|%0, %1, %2}"
-  [(set_attr "type" "sselog,ssemov")
-   (set_attr "prefix" "vex")
-   (set_attr "mode" "TI,V2SF")])
-
-(define_insn "*vec_concatv4si_1"
-  [(set (match_operand:V4SI 0 "register_operand"       "=Y2,x,x")
-       (vec_concat:V4SI
-         (match_operand:V2SI 1 "register_operand"     " 0 ,0,0")
-         (match_operand:V2SI 2 "nonimmediate_operand" " Y2,x,m")))]
+         (match_operand:V2SI 1 "register_operand"     " 0 ,x,0,0,x")
+         (match_operand:V2SI 2 "nonimmediate_operand" " Y2,x,x,m,m")))]
   "TARGET_SSE"
   "@
    punpcklqdq\t{%2, %0|%0, %2}
+   vpunpcklqdq\t{%2, %1, %0|%0, %1, %2}
    movlhps\t{%2, %0|%0, %2}
-   movhps\t{%2, %0|%0, %2}"
-  [(set_attr "type" "sselog,ssemov,ssemov")
-   (set_attr "mode" "TI,V4SF,V2SF")])
+   movhps\t{%2, %0|%0, %2}
+   vmovhps\t{%2, %1, %0|%0, %1, %2}"
+  [(set_attr "isa" "noavx,avx,noavx,noavx,avx")
+   (set_attr "type" "sselog,sselog,ssemov,ssemov,ssemov")
+   (set_attr "prefix" "orig,vex,orig,orig,vex")
+   (set_attr "mode" "TI,TI,V4SF,V2SF,V2SF")])
 
 ;; movd instead of movq is required to handle broken assemblers.
 (define_insn "*vec_concatv2di_rex64_sse4_1"