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opcodes/
authorMaciej W. Rozycki <macro@linux-mips.org>
Fri, 23 Aug 2013 14:12:59 +0000 (14:12 +0000)
committerMaciej W. Rozycki <macro@linux-mips.org>
Fri, 23 Aug 2013 14:12:59 +0000 (14:12 +0000)
* micromips-opc.c (micromips_opcodes): Use RD_4 for "alnv.ps",
replacing NODS.

gas/testsuite/
* gas/testsuite/gas/mips/micromips-insn32.d: Adjust for delay
slot scheduling of ALNV.PS.
* gas/testsuite/gas/mips/micromips-noinsn32.d: Likewise.
* gas/testsuite/gas/mips/micromips-trap.d: Likewise.
* gas/testsuite/gas/mips/micromips.d: Likewise.
* gas/testsuite/gas/mips/micromips@alnv_ps-swap.d: Likewise.

gas/testsuite/ChangeLog patch | blob | history
gas/testsuite/gas/mips/micromips-insn32.d patch | blob | history
gas/testsuite/gas/mips/micromips-noinsn32.d patch | blob | history
gas/testsuite/gas/mips/micromips-trap.d patch | blob | history
gas/testsuite/gas/mips/micromips.d patch | blob | history
gas/testsuite/gas/mips/micromips@alnv_ps-swap.d patch | blob | history
opcodes/ChangeLog patch | blob | history
opcodes/micromips-opc.c patch | blob | history

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 253b3a5d416faf7af4d61c3383bacb40f4513ec7..eb39f6b2908f4e571406b9542a5af56ab039c177 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2013-08-23  Maciej W. Rozycki  <macro@codesourcery.com>
+
+       * gas/testsuite/gas/mips/micromips-insn32.d: Adjust for delay
+       slot scheduling of ALNV.PS.
+       * gas/testsuite/gas/mips/micromips-noinsn32.d: Likewise.
+       * gas/testsuite/gas/mips/micromips-trap.d: Likewise.
+       * gas/testsuite/gas/mips/micromips.d: Likewise.
+       * gas/testsuite/gas/mips/micromips@alnv_ps-swap.d: Likewise.
+
 2013-08-23  Yuri Chornoivan  <yurchor@ukr.net>
 
        PR binutils/15834
diff --git a/gas/testsuite/gas/mips/micromips-insn32.d b/gas/testsuite/gas/mips/micromips-insn32.d
index d7092df5a30b20f3ac7733875805cdd778a68d7c..a28c519585ed390575b7a104c76ba18475528c05 100644 (file)
--- a/gas/testsuite/gas/mips/micromips-insn32.d
+++ b/gas/testsuite/gas/mips/micromips-insn32.d
@@ -5106,10 +5106,9 @@ Disassembly of section \.text:
 [ 0-9a-f]+:    5441 0099       alnv\.ps        \$f0,\$f1,\$f2,v0
 [ 0-9a-f]+:    5441 07d9       alnv\.ps        \$f0,\$f1,\$f2,ra
 [ 0-9a-f]+:    57fe efd9       alnv\.ps        \$f29,\$f30,\$f31,ra
-[ 0-9a-f]+:    57fd efd9       alnv\.ps        \$f29,\$f29,\$f31,ra
 [ 0-9a-f]+:    4380 fffe       bc1f    [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC16_S1        fp_test
-[ 0-9a-f]+:    0000 0000       nop
+[ 0-9a-f]+:    57fd efd9       alnv\.ps        \$f29,\$f29,\$f31,ra
 [ 0-9a-f]+:    4380 fffe       bc1f    [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC16_S1        fp_test
 [ 0-9a-f]+:    0000 0000       nop
diff --git a/gas/testsuite/gas/mips/micromips-noinsn32.d b/gas/testsuite/gas/mips/micromips-noinsn32.d
index 341a579bd0681e8d1a0d857bf6762bc4fb42f194..520c9cb3f875cee28553aef7dda95ecda7f55636 100644 (file)
--- a/gas/testsuite/gas/mips/micromips-noinsn32.d
+++ b/gas/testsuite/gas/mips/micromips-noinsn32.d
@@ -5085,10 +5085,9 @@ Disassembly of section \.text:
 [ 0-9a-f]+:    5441 0099       alnv\.ps        \$f0,\$f1,\$f2,v0
 [ 0-9a-f]+:    5441 07d9       alnv\.ps        \$f0,\$f1,\$f2,ra
 [ 0-9a-f]+:    57fe efd9       alnv\.ps        \$f29,\$f30,\$f31,ra
-[ 0-9a-f]+:    57fd efd9       alnv\.ps        \$f29,\$f29,\$f31,ra
 [ 0-9a-f]+:    4380 fffe       bc1f    [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC16_S1        fp_test
-[ 0-9a-f]+:    0c00            nop
+[ 0-9a-f]+:    57fd efd9       alnv\.ps        \$f29,\$f29,\$f31,ra
 [ 0-9a-f]+:    4380 fffe       bc1f    [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC16_S1        fp_test
 [ 0-9a-f]+:    0c00            nop
diff --git a/gas/testsuite/gas/mips/micromips-trap.d b/gas/testsuite/gas/mips/micromips-trap.d
index 16f82407b0505122ab7f48c5870c868a24982028..f1167a0af9a0c1289085e9b0e995231e8ef2ab16 100644 (file)
--- a/gas/testsuite/gas/mips/micromips-trap.d
+++ b/gas/testsuite/gas/mips/micromips-trap.d
@@ -5091,10 +5091,9 @@ Disassembly of section \.text:
 [ 0-9a-f]+:    5441 0099       alnv\.ps        \$f0,\$f1,\$f2,v0
 [ 0-9a-f]+:    5441 07d9       alnv\.ps        \$f0,\$f1,\$f2,ra
 [ 0-9a-f]+:    57fe efd9       alnv\.ps        \$f29,\$f30,\$f31,ra
-[ 0-9a-f]+:    57fd efd9       alnv\.ps        \$f29,\$f29,\$f31,ra
 [ 0-9a-f]+:    4380 fffe       bc1f    [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC16_S1        fp_test
-[ 0-9a-f]+:    0c00            nop
+[ 0-9a-f]+:    57fd efd9       alnv\.ps        \$f29,\$f29,\$f31,ra
 [ 0-9a-f]+:    4380 fffe       bc1f    [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC16_S1        fp_test
 [ 0-9a-f]+:    0c00            nop
diff --git a/gas/testsuite/gas/mips/micromips.d b/gas/testsuite/gas/mips/micromips.d
index 9f54ec495ba87bdce16d63b9b775196cee4f79dd..4821d0997e979701c6c0cba9a56b01c6f01edb08 100644 (file)
--- a/gas/testsuite/gas/mips/micromips.d
+++ b/gas/testsuite/gas/mips/micromips.d
@@ -5163,10 +5163,9 @@ Disassembly of section \.text:
 [ 0-9a-f]+:    5441 0099       alnv\.ps        \$f0,\$f1,\$f2,v0
 [ 0-9a-f]+:    5441 07d9       alnv\.ps        \$f0,\$f1,\$f2,ra
 [ 0-9a-f]+:    57fe efd9       alnv\.ps        \$f29,\$f30,\$f31,ra
-[ 0-9a-f]+:    57fd efd9       alnv\.ps        \$f29,\$f29,\$f31,ra
 [ 0-9a-f]+:    4380 fffe       bc1f    [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC16_S1        fp_test
-[ 0-9a-f]+:    0c00            nop
+[ 0-9a-f]+:    57fd efd9       alnv\.ps        \$f29,\$f29,\$f31,ra
 [ 0-9a-f]+:    4380 fffe       bc1f    [0-9a-f]+ <fp_test\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC16_S1        fp_test
 [ 0-9a-f]+:    0c00            nop
diff --git a/gas/testsuite/gas/mips/micromips@alnv_ps-swap.d b/gas/testsuite/gas/mips/micromips@alnv_ps-swap.d
index 2fbe526a41e115d8e360dca0c2f978faef29a268..87a2e72131dfcb0f0e904dbfe4566dda1c8cafd7 100644 (file)
--- a/gas/testsuite/gas/mips/micromips@alnv_ps-swap.d
+++ b/gas/testsuite/gas/mips/micromips@alnv_ps-swap.d
@@ -6,37 +6,28 @@
 # Check that a register dependency between ALNV.PS and the following
 # branch prevents from branch swapping (microMIPS).
 
-# Note that currently swapping of ALNV.PS in microMIPS code is disabled
-# altogether.
-
 .*: +file format .*mips.*
 
 Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> 5402 20d9    alnv\.ps        \$f4,\$f2,\$f0,v1
-([0-9a-f]+) <[^>]*> cfff       b       \1 <foo\+0x[0-9a-f]+>
+([0-9a-f]+) <[^>]*> cfff       b       \1 <foo>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC10_S1        foo
-[0-9a-f]+ <[^>]*> 0c00         nop
 [0-9a-f]+ <[^>]*> 5402 20d9    alnv\.ps        \$f4,\$f2,\$f0,v1
 ([0-9a-f]+) <[^>]*> 4060 fffe  bal     \1 <foo\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC16_S1        foo
-[0-9a-f]+ <[^>]*> 0000 0000    nop
 [0-9a-f]+ <[^>]*> 5402 20d9    alnv\.ps        \$f4,\$f2,\$f0,v1
 ([0-9a-f]+) <[^>]*> 4023 fffe  bltzal  v1,\1 <foo\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC16_S1        foo
-[0-9a-f]+ <[^>]*> 0000 0000    nop
 [0-9a-f]+ <[^>]*> 5402 20d9    alnv\.ps        \$f4,\$f2,\$f0,v1
 [0-9a-f]+ <[^>]*> 45c3         jalr    v1
-[0-9a-f]+ <[^>]*> 0000 0000    nop
 [0-9a-f]+ <[^>]*> 5402 20d9    alnv\.ps        \$f4,\$f2,\$f0,v1
 [0-9a-f]+ <[^>]*> 0083 0f3c    jalr    a0,v1
-[0-9a-f]+ <[^>]*> 0000 0000    nop
+[0-9a-f]+ <[^>]*> 5402 20d9    alnv\.ps        \$f4,\$f2,\$f0,v1
 [0-9a-f]+ <[^>]*> 5402 20d9    alnv\.ps        \$f4,\$f2,\$f0,v1
 [0-9a-f]+ <[^>]*> 007f 0f3c    jalr    v1,ra
 [0-9a-f]+ <[^>]*> 0000 0000    nop
-[0-9a-f]+ <[^>]*> 5402 27d9    alnv\.ps        \$f4,\$f2,\$f0,ra
 ([0-9a-f]+) <[^>]*> cfff       b       \1 <foo\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC10_S1        foo
-[0-9a-f]+ <[^>]*> 0c00         nop
+[0-9a-f]+ <[^>]*> 5402 27d9    alnv\.ps        \$f4,\$f2,\$f0,ra
 [0-9a-f]+ <[^>]*> 5402 27d9    alnv\.ps        \$f4,\$f2,\$f0,ra
 ([0-9a-f]+) <[^>]*> 4060 fffe  bal     \1 <foo\+0x[0-9a-f]+>
 [      ]*[0-9a-f]+: R_MICROMIPS_PC16_S1        foo
@@ -48,10 +39,8 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 5402 27d9    alnv\.ps        \$f4,\$f2,\$f0,ra
 [0-9a-f]+ <[^>]*> 45c3         jalr    v1
 [0-9a-f]+ <[^>]*> 0000 0000    nop
-[0-9a-f]+ <[^>]*> 5402 27d9    alnv\.ps        \$f4,\$f2,\$f0,ra
 [0-9a-f]+ <[^>]*> 0083 0f3c    jalr    a0,v1
-[0-9a-f]+ <[^>]*> 0000 0000    nop
 [0-9a-f]+ <[^>]*> 5402 27d9    alnv\.ps        \$f4,\$f2,\$f0,ra
 [0-9a-f]+ <[^>]*> 007f 0f3c    jalr    v1,ra
-[0-9a-f]+ <[^>]*> 0000 0000    nop
+[0-9a-f]+ <[^>]*> 5402 27d9    alnv\.ps        \$f4,\$f2,\$f0,ra
        \.\.\.
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 7427f14fba71f931db0a09aa79e0560e41083771..ce6aebecf18306f3d3c6b1b8e7c982db54963bb4 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2013-08-23  Maciej W. Rozycki  <macro@codesourcery.com>
+
+       * micromips-opc.c (micromips_opcodes): Use RD_4 for "alnv.ps",
+       replacing NODS.
+
 2013-08-23  Yuri Chornoivan  <yurchor@ukr.net>
 
        PR binutils/15834
diff --git a/opcodes/micromips-opc.c b/opcodes/micromips-opc.c
index da1f708d97e3bd8f1c857a28d1c8317d474ca63a..fa6efb51486f6c57f23b1a2d2d14bfd60cd5ccfc 100644 (file)
--- a/opcodes/micromips-opc.c
+++ b/opcodes/micromips-opc.c
@@ -309,9 +309,7 @@ const struct mips_opcode micromips_opcodes[] =
 {"addu",               "md,me,ml",         0x0400,     0xfc01, WR_1|RD_2|RD_3,         0,              I1,             0,      0 },
 {"addu",               "d,v,t",        0x00000150, 0xfc0007ff, WR_1|RD_2|RD_3,         0,              I1,             0,      0 },
 {"addu",               "t,r,I",        0,    (int) M_ADDU_I,   INSN_MACRO,             0,              I1,             0,      0 },
-/* We have no flag to mark the read from "y", so we use NODS to disable
-   delay slot scheduling of ALNV.PS altogether.  */
-{"alnv.ps",            "D,V,T,y",      0x54000019, 0xfc00003f, WR_1|RD_2|RD_3|NODS|FP_D, 0,            I1,             0,      0 },
+{"alnv.ps",            "D,V,T,y",      0x54000019, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0,            I1,             0,      0 },
 {"and",                        "mf,mt,mg",         0x4480,     0xffc0, MOD_1|RD_3,             0,              I1,             0,      0 },
 {"and",                        "mf,mg,mx",         0x4480,     0xffc0, MOD_1|RD_2,             0,              I1,             0,      0 },
 {"and",                        "d,v,t",        0x00000250, 0xfc0007ff, WR_1|RD_2|RD_3,         0,              I1,             0,      0 },