re PR rtl-optimization/65693 (ICE in assign_by_spills, at lra-assigns.c:1419)

	PR rtl-optimization/65693
	* combine.c (is_parallel_of_n_reg_sets): Move outside of
	#ifndef HAVE_cc0.

From-SVN: r221951

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 36e027add255b0e8ade2ffd2a6d617166dd34d9e..4d1a189fdaa145fd8719ec7038eabced63ef1e19 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-04-09  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       PR rtl-optimization/65693
+       * combine.c (is_parallel_of_n_reg_sets): Move outside of
+       #ifndef HAVE_cc0.
+
 2015-04-09  Georg-Johann Lay  <avr@gjlay.de>
 
        PR target/65296

diff --git a/gcc/combine.c b/gcc/combine.c
index 6f4a8da97618edef16df3fabb214e6e251a54865..46cd6db62ad83970dfbb61e7e93f827c26dfc63a 100644 (file)
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -2492,7 +2492,6 @@ update_cfg_for_uncondjump (rtx_insn *insn)
     }
 }
 
-#ifndef HAVE_cc0
 /* Return whether PAT is a PARALLEL of exactly N register SETs followed
    by an arbitrary number of CLOBBERs.  */
 static bool
@@ -2517,6 +2516,7 @@ is_parallel_of_n_reg_sets (rtx pat, int n)
   return true;
 }
 
+#ifndef HAVE_cc0
 /* Return whether INSN, a PARALLEL of N register SETs (and maybe some
    CLOBBERs), can be split into individual SETs in that order, without
    changing semantics.  */