+2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * elf32-s390.c: Add new relocation definitions R_390_PC12DBL,
+ R_390_PLT12DBL, R_390_PC24DBL, and R_390_PLT24DBL.
+ (elf_s390_reloc_type_lookup, elf_s390_check_relocs)
+ (elf_s390_gc_sweep_hook, elf_s390_relocate_section): Support new
+ relocations.
+ * elf64-s390.c: See elf32-s390.c
+ * bfd-in2.h: Add new relocs to enum bfd_reloc_code_real.
+ * libbfd.h: Add new reloc strings.
+
2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Reorder case
/* 16 bit GOT offset. */
BFD_RELOC_390_GOT16,
+/* PC relative 12 bit shifted by 1. */
+ BFD_RELOC_390_PC12DBL,
+
+/* 12 bit PC rel. PLT shifted by 1. */
+ BFD_RELOC_390_PLT12DBL,
+
/* PC relative 16 bit shifted by 1. */
BFD_RELOC_390_PC16DBL,
/* 16 bit PC rel. PLT shifted by 1. */
BFD_RELOC_390_PLT16DBL,
+/* PC relative 24 bit shifted by 1. */
+ BFD_RELOC_390_PC24DBL,
+
+/* 24 bit PC rel. PLT shifted by 1. */
+ BFD_RELOC_390_PLT24DBL,
+
/* PC relative 32 bit shifted by 1. */
BFD_RELOC_390_PC32DBL,
{
HOWTO (R_390_NONE, /* type */
0, /* rightshift */
- 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* size (0 = byte, 1 = 2 byte, 2 = 4 byte) */
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
s390_elf_ldisp_reloc, "R_390_TLS_GOTIE20", FALSE, 0,0x0fffff00, FALSE),
HOWTO(R_390_IRELATIVE, 0, 2, 32, TRUE, 0, complain_overflow_bitfield,
bfd_elf_generic_reloc, "R_390_IRELATIVE", FALSE, 0, 0xffffffff, FALSE),
+ HOWTO(R_390_PC12DBL, 1, 1, 12, TRUE, 0, complain_overflow_bitfield,
+ bfd_elf_generic_reloc, "R_390_PC12DBL", FALSE, 0,0x00000fff, TRUE),
+ HOWTO(R_390_PLT12DBL, 1, 1, 12, TRUE, 0, complain_overflow_bitfield,
+ bfd_elf_generic_reloc, "R_390_PLT12DBL", FALSE, 0,0x00000fff, TRUE),
+ HOWTO(R_390_PC24DBL, 1, 2, 24, TRUE, 0, complain_overflow_bitfield,
+ bfd_elf_generic_reloc, "R_390_PC24DBL", FALSE, 0,0x00ffffff, TRUE),
+ HOWTO(R_390_PLT24DBL, 1, 2, 24, TRUE, 0, complain_overflow_bitfield,
+ bfd_elf_generic_reloc, "R_390_PLT24DBL", FALSE, 0,0x00ffffff, TRUE),
};
/* GNU extension to record C++ vtable hierarchy. */
return &elf_howto_table[(int) R_390_GOT16];
case BFD_RELOC_16_PCREL:
return &elf_howto_table[(int) R_390_PC16];
+ case BFD_RELOC_390_PC12DBL:
+ return &elf_howto_table[(int) R_390_PC12DBL];
+ case BFD_RELOC_390_PLT12DBL:
+ return &elf_howto_table[(int) R_390_PLT12DBL];
case BFD_RELOC_390_PC16DBL:
return &elf_howto_table[(int) R_390_PC16DBL];
case BFD_RELOC_390_PLT16DBL:
return &elf_howto_table[(int) R_390_PLT16DBL];
+ case BFD_RELOC_390_PC24DBL:
+ return &elf_howto_table[(int) R_390_PC24DBL];
+ case BFD_RELOC_390_PLT24DBL:
+ return &elf_howto_table[(int) R_390_PLT24DBL];
case BFD_RELOC_390_PC32DBL:
return &elf_howto_table[(int) R_390_PC32DBL];
case BFD_RELOC_390_PLT32DBL:
are done. */
break;
+ case R_390_PLT12DBL:
case R_390_PLT16DBL:
+ case R_390_PLT24DBL:
case R_390_PLT32DBL:
case R_390_PLT32:
case R_390_PLTOFF16:
case R_390_16:
case R_390_32:
case R_390_PC16:
+ case R_390_PC12DBL:
case R_390_PC16DBL:
+ case R_390_PC24DBL:
case R_390_PC32DBL:
case R_390_PC32:
if (h != NULL)
if ((info->shared
&& (sec->flags & SEC_ALLOC) != 0
&& ((ELF32_R_TYPE (rel->r_info) != R_390_PC16
+ && ELF32_R_TYPE (rel->r_info) != R_390_PC12DBL
&& ELF32_R_TYPE (rel->r_info) != R_390_PC16DBL
+ && ELF32_R_TYPE (rel->r_info) != R_390_PC24DBL
&& ELF32_R_TYPE (rel->r_info) != R_390_PC32DBL
&& ELF32_R_TYPE (rel->r_info) != R_390_PC32)
|| (h != NULL
p->count += 1;
if (ELF32_R_TYPE (rel->r_info) == R_390_PC16
+ || ELF32_R_TYPE (rel->r_info) == R_390_PC12DBL
|| ELF32_R_TYPE (rel->r_info) == R_390_PC16DBL
+ || ELF32_R_TYPE (rel->r_info) == R_390_PC24DBL
|| ELF32_R_TYPE (rel->r_info) == R_390_PC32DBL
|| ELF32_R_TYPE (rel->r_info) == R_390_PC32)
p->pc_count += 1;
case R_390_20:
case R_390_32:
case R_390_PC16:
+ case R_390_PC12DBL:
case R_390_PC16DBL:
+ case R_390_PC24DBL:
case R_390_PC32DBL:
case R_390_PC32:
if (info->shared)
break;
/* Fall through. */
+ case R_390_PLT12DBL:
case R_390_PLT16DBL:
+ case R_390_PLT24DBL:
case R_390_PLT32DBL:
case R_390_PLT32:
case R_390_PLTOFF16:
unresolved_reloc = FALSE;
break;
+ case R_390_PLT12DBL:
case R_390_PLT16DBL:
+ case R_390_PLT24DBL:
case R_390_PLT32DBL:
case R_390_PLT32:
/* Relocation is to the entry for this symbol in the
case R_390_16:
case R_390_32:
case R_390_PC16:
+ case R_390_PC12DBL:
case R_390_PC16DBL:
+ case R_390_PC24DBL:
case R_390_PC32DBL:
case R_390_PC32:
if (h != NULL
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak)
&& ((r_type != R_390_PC16
+ && r_type != R_390_PC12DBL
&& r_type != R_390_PC16DBL
+ && r_type != R_390_PC24DBL
&& r_type != R_390_PC32DBL
&& r_type != R_390_PC32)
|| !SYMBOL_CALLS_LOCAL (info, h)))
else if (h != NULL
&& h->dynindx != -1
&& (r_type == R_390_PC16
+ || r_type == R_390_PC12DBL
|| r_type == R_390_PC16DBL
+ || r_type == R_390_PC24DBL
|| r_type == R_390_PC32DBL
|| r_type == R_390_PC32
|| !info->shared
do_relocation:
+ /* When applying a 24 bit reloc we need to start one byte
+ earlier. Otherwise the 32 bit get/put bfd operations might
+ access a byte after the actual section. */
+ if (r_type == R_390_PC24DBL
+ || r_type == R_390_PLT24DBL)
+ rel->r_offset--;
+
if (r_type == R_390_20
|| r_type == R_390_GOT20
|| r_type == R_390_GOTPLT20
{
HOWTO (R_390_NONE, /* type */
0, /* rightshift */
- 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* size (0 = byte, 1 = 2 byte, 2 = 4 byte) */
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
s390_elf_ldisp_reloc, "R_390_TLS_GOTIE20", FALSE, 0,0x0fffff00, FALSE),
HOWTO(R_390_IRELATIVE, 0, 4, 64, FALSE, 0, complain_overflow_bitfield,
bfd_elf_generic_reloc, "R_390_IRELATIVE", FALSE, 0, MINUS_ONE, FALSE),
-
+ HOWTO(R_390_PC12DBL, 1, 1, 12, TRUE, 0, complain_overflow_bitfield,
+ bfd_elf_generic_reloc, "R_390_PC12DBL", FALSE, 0,0x00000fff, TRUE),
+ HOWTO(R_390_PLT12DBL, 1, 1, 12, TRUE, 0, complain_overflow_bitfield,
+ bfd_elf_generic_reloc, "R_390_PLT12DBL", FALSE, 0,0x00000fff, TRUE),
+ HOWTO(R_390_PC24DBL, 1, 2, 24, TRUE, 0, complain_overflow_bitfield,
+ bfd_elf_generic_reloc, "R_390_PC24DBL", FALSE, 0,0x00ffffff, TRUE),
+ HOWTO(R_390_PLT24DBL, 1, 2, 24, TRUE, 0, complain_overflow_bitfield,
+ bfd_elf_generic_reloc, "R_390_PLT24DBL", FALSE, 0,0x00ffffff, TRUE),
};
/* GNU extension to record C++ vtable hierarchy. */
return &elf_howto_table[(int) R_390_GOT16];
case BFD_RELOC_16_PCREL:
return &elf_howto_table[(int) R_390_PC16];
+ case BFD_RELOC_390_PC12DBL:
+ return &elf_howto_table[(int) R_390_PC12DBL];
+ case BFD_RELOC_390_PLT12DBL:
+ return &elf_howto_table[(int) R_390_PLT12DBL];
case BFD_RELOC_390_PC16DBL:
return &elf_howto_table[(int) R_390_PC16DBL];
case BFD_RELOC_390_PLT16DBL:
return &elf_howto_table[(int) R_390_PLT16DBL];
+ case BFD_RELOC_390_PC24DBL:
+ return &elf_howto_table[(int) R_390_PC24DBL];
+ case BFD_RELOC_390_PLT24DBL:
+ return &elf_howto_table[(int) R_390_PLT24DBL];
case BFD_RELOC_390_PC32DBL:
return &elf_howto_table[(int) R_390_PC32DBL];
case BFD_RELOC_390_PLT32DBL:
are done. */
break;
+ case R_390_PLT12DBL:
case R_390_PLT16DBL:
+ case R_390_PLT24DBL:
case R_390_PLT32:
case R_390_PLT32DBL:
case R_390_PLT64:
case R_390_16:
case R_390_32:
case R_390_64:
+ case R_390_PC12DBL:
case R_390_PC16:
case R_390_PC16DBL:
+ case R_390_PC24DBL:
case R_390_PC32:
case R_390_PC32DBL:
case R_390_PC64:
if ((info->shared
&& (sec->flags & SEC_ALLOC) != 0
&& ((ELF64_R_TYPE (rel->r_info) != R_390_PC16
+ && ELF64_R_TYPE (rel->r_info) != R_390_PC12DBL
&& ELF64_R_TYPE (rel->r_info) != R_390_PC16DBL
+ && ELF64_R_TYPE (rel->r_info) != R_390_PC24DBL
&& ELF64_R_TYPE (rel->r_info) != R_390_PC32
&& ELF64_R_TYPE (rel->r_info) != R_390_PC32DBL
&& ELF64_R_TYPE (rel->r_info) != R_390_PC64)
p->count += 1;
if (ELF64_R_TYPE (rel->r_info) == R_390_PC16
+ || ELF64_R_TYPE (rel->r_info) == R_390_PC12DBL
+ || ELF64_R_TYPE (rel->r_info) == R_390_PC16DBL
|| ELF64_R_TYPE (rel->r_info) == R_390_PC16DBL
|| ELF64_R_TYPE (rel->r_info) == R_390_PC32
|| ELF64_R_TYPE (rel->r_info) == R_390_PC32DBL
case R_390_32:
case R_390_64:
case R_390_PC16:
+ case R_390_PC12DBL:
case R_390_PC16DBL:
+ case R_390_PC24DBL:
case R_390_PC32:
case R_390_PC32DBL:
case R_390_PC64:
break;
/* Fall through */
+ case R_390_PLT12DBL:
case R_390_PLT16DBL:
+ case R_390_PLT24DBL:
case R_390_PLT32:
case R_390_PLT32DBL:
case R_390_PLT64:
unresolved_reloc = FALSE;
break;
+ case R_390_PLT12DBL:
case R_390_PLT16DBL:
+ case R_390_PLT24DBL:
case R_390_PLT32:
case R_390_PLT32DBL:
case R_390_PLT64:
case R_390_32:
case R_390_64:
case R_390_PC16:
+ case R_390_PC12DBL:
case R_390_PC16DBL:
+ case R_390_PC24DBL:
case R_390_PC32:
case R_390_PC32DBL:
case R_390_PC64:
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak)
&& ((r_type != R_390_PC16
+ && r_type != R_390_PC12DBL
&& r_type != R_390_PC16DBL
+ && r_type != R_390_PC24DBL
&& r_type != R_390_PC32
&& r_type != R_390_PC32DBL
&& r_type != R_390_PC64)
else if (h != NULL
&& h->dynindx != -1
&& (r_type == R_390_PC16
+ || r_type == R_390_PC12DBL
|| r_type == R_390_PC16DBL
+ || r_type == R_390_PC24DBL
|| r_type == R_390_PC32
|| r_type == R_390_PC32DBL
|| r_type == R_390_PC64
do_relocation:
+ /* When applying a 24 bit reloc we need to start one byte
+ earlier. Otherwise the 32 bit get/put bfd operations might
+ access a byte after the actual section. */
+ if (r_type == R_390_PC24DBL
+ || r_type == R_390_PLT24DBL)
+ rel->r_offset--;
+
if (r_type == R_390_20
|| r_type == R_390_GOT20
|| r_type == R_390_GOTPLT20
"BFD_RELOC_390_RELATIVE",
"BFD_RELOC_390_GOTPC",
"BFD_RELOC_390_GOT16",
+ "BFD_RELOC_390_PC12DBL",
+ "BFD_RELOC_390_PLT12DBL",
"BFD_RELOC_390_PC16DBL",
"BFD_RELOC_390_PLT16DBL",
+ "BFD_RELOC_390_PC24DBL",
+ "BFD_RELOC_390_PLT24DBL",
"BFD_RELOC_390_PC32DBL",
"BFD_RELOC_390_PLT32DBL",
"BFD_RELOC_390_GOTPCDBL",
+2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
+ relocs.
+
2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
* config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
else if (suffix == ELF_SUFFIX_PLT)
{
if ((operand->flags & S390_OPERAND_PCREL)
- && (operand->bits == 16))
+ && (operand->bits == 12))
+ reloc = BFD_RELOC_390_PLT12DBL;
+ else if ((operand->flags & S390_OPERAND_PCREL)
+ && (operand->bits == 16))
reloc = BFD_RELOC_390_PLT16DBL;
+ else if ((operand->flags & S390_OPERAND_PCREL)
+ && (operand->bits == 24))
+ reloc = BFD_RELOC_390_PLT24DBL;
else if ((operand->flags & S390_OPERAND_PCREL)
&& (operand->bits == 32))
reloc = BFD_RELOC_390_PLT32DBL;
if (!reloc_howto)
abort ();
- size = bfd_get_reloc_size (reloc_howto);
+ size = ((reloc_howto->bitsize - 1) / 8) + 1;
if (size < 1 || size > 4)
abort ();
|| fixP->fx_r_type == BFD_RELOC_390_PLTOFF16
|| fixP->fx_r_type == BFD_RELOC_390_PLTOFF32
|| fixP->fx_r_type == BFD_RELOC_390_PLTOFF64
+ || fixP->fx_r_type == BFD_RELOC_390_PLT12DBL
|| fixP->fx_r_type == BFD_RELOC_390_PLT16DBL
+ || fixP->fx_r_type == BFD_RELOC_390_PLT24DBL
|| fixP->fx_r_type == BFD_RELOC_390_PLT32
|| fixP->fx_r_type == BFD_RELOC_390_PLT32DBL
|| fixP->fx_r_type == BFD_RELOC_390_PLT64
case BFD_RELOC_390_GOT64:
case BFD_RELOC_390_GOTENT:
case BFD_RELOC_390_PLT32:
+ case BFD_RELOC_390_PLT12DBL:
case BFD_RELOC_390_PLT16DBL:
+ case BFD_RELOC_390_PLT24DBL:
case BFD_RELOC_390_PLT32DBL:
case BFD_RELOC_390_PLT64:
case BFD_RELOC_390_GOTPLT12:
fixP->fx_where += 1;
fixP->fx_r_type = BFD_RELOC_8;
}
+ else if (operand->bits == 12 && operand->shift == 12
+ && (operand->flags & S390_OPERAND_PCREL))
+ {
+ fixP->fx_size = 2;
+ fixP->fx_where += 1;
+ fixP->fx_offset += 1;
+ fixP->fx_r_type = BFD_RELOC_390_PC12DBL;
+ }
else if (operand->bits == 16 && operand->shift == 16)
{
fixP->fx_size = 2;
else
fixP->fx_r_type = BFD_RELOC_16;
}
+ else if (operand->bits == 24 && operand->shift == 24
+ && (operand->flags & S390_OPERAND_PCREL))
+ {
+ fixP->fx_size = 3;
+ fixP->fx_where += 3;
+ fixP->fx_offset += 3;
+ fixP->fx_r_type = BFD_RELOC_390_PC24DBL;
+ }
else if (operand->bits == 32 && operand->shift == 16
&& (operand->flags & S390_OPERAND_PCREL))
{
case BFD_RELOC_390_12:
case BFD_RELOC_390_GOT12:
case BFD_RELOC_390_GOTPLT12:
+ case BFD_RELOC_390_PC12DBL:
+ case BFD_RELOC_390_PLT12DBL:
+ if (fixP->fx_pcrel)
+ value++;
+
if (fixP->fx_done)
{
unsigned short mop;
+ if (fixP->fx_pcrel)
+ value >>= 1;
+
mop = bfd_getb16 ((unsigned char *) where);
mop |= (unsigned short) (value & 0xfff);
bfd_putb16 ((bfd_vma) mop, (unsigned char *) where);
md_number_to_chars (where, (offsetT) value >> 1, 2);
break;
+ case BFD_RELOC_390_PC24DBL:
+ case BFD_RELOC_390_PLT24DBL:
+ value += 3;
+ if (fixP->fx_done)
+ {
+ unsigned int mop;
+ value >>= 1;
+
+ mop = bfd_getb32 ((unsigned char *) where - 1);
+ mop |= (unsigned int) (value & 0xffffff);
+ bfd_putb32 ((bfd_vma) mop, (unsigned char *) where - 1);
+ }
+ break;
+
case BFD_RELOC_32:
if (fixP->fx_pcrel)
fixP->fx_r_type = BFD_RELOC_32_PCREL;
+2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * gas/s390/zarch-zEC12.s: Change bprp second operand and add
+ variants requiring relocations.
+ * gas/s390/zarch-zEC12.d: Likewise.
+
2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
* gas/aarch64/reloc-insn.s (func): Replace :got_prel19: with :got:.
#name: s390x opcode
-#objdump: -drw
+#objdump: -dr
.*: +file format .*
.*: e5 61 6f a0 fd e8 [ ]*tbeginc 4000\(%r6\),65000
.*: b2 f8 00 00 [ ]*tend
.*: c7 a0 6f a0 00 00 [ ]*bpp 10,1e <foo\+0x1e>,4000\(%r6\)
-.*: c5 a0 00 fe c7 80 [ ]*bprp 10,24 <foo\+0x24>,-80000
+.*: c5 a0 00 00 00 0c [ ]*bprp 10,24 <foo\+0x24>,3c <foo\+0x3c>
.*: b2 fa 00 ad [ ]*niai 10,13
.*: e3 67 8a 4d fe 9f [ ]*lat %r6,-5555\(%r7,%r8\)
.*: e3 67 8a 4d fe 85 [ ]*lgat %r6,-5555\(%r7,%r8\)
.*: b2 e8 c0 56 [ ]*ppa %r5,%r6,12
.*: b9 8f 60 59 [ ]*crdte %r5,%r6,%r9,0
.*: b9 8f 61 59 [ ]*crdte %r5,%r6,%r9,1
-.*: 07 07 [ ]*nopr %r7
+.*: c5 a0 06 00 00 06 [ ]*bprp 10,11e <bar>,11e <bar>
+.*: c5 a0 00 00 00 00 [ ]*bprp 10,118 <foo\+0x118>,118 <foo\+0x118>
+[ ]*119: R_390_PLT12DBL bar\+0x1
+[ ]*11b: R_390_PLT24DBL bar\+0x3
+.* <bar>:
+.*: 07 07 [ ]*nopr %r7
tbeginc 4000(%r6),65000
tend
bpp 10,.,4000(%r6)
- bprp 10,.,-80000
+ bprp 10,.,.+24
niai 10,13
lat %r6,-5555(%r7,%r8)
lgat %r6,-5555(%r7,%r8)
ppa %r5,%r6,12
crdte %r5,%r6,%r9
crdte %r5,%r6,%r9,1
+
+ bprp 10,bar,bar
+ bprp 10,bar@PLT,bar@PLT
+bar:
+2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * s390.h: Add new relocs R_390_PC12DBL, R_390_PLT12DBL,
+ R_390_PC24DBL, and R_390_PLT24DBL.
+
2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones.
RELOC_NUMBER (R_390_GOTPC, 14) /* 32 bit PC relative offset to GOT. */
RELOC_NUMBER (R_390_GOT16, 15) /* 16 bit GOT offset. */
RELOC_NUMBER (R_390_PC16, 16) /* PC relative 16 bit. */
+ RELOC_NUMBER (R_390_PC12DBL, 62) /* PC relative 12 bit shifted by 1. */
+ RELOC_NUMBER (R_390_PLT12DBL, 63) /* 12 bit PC rel. PLT shifted by 1. */
RELOC_NUMBER (R_390_PC16DBL, 17) /* PC relative 16 bit shifted by 1. */
RELOC_NUMBER (R_390_PLT16DBL, 18) /* 16 bit PC rel. PLT shifted by 1. */
+ RELOC_NUMBER (R_390_PC24DBL, 64) /* PC relative 24 bit shifted by 1. */
+ RELOC_NUMBER (R_390_PLT24DBL, 65) /* 24 bit PC rel. PLT shifted by 1. */
RELOC_NUMBER (R_390_PC32DBL, 19) /* PC relative 32 bit shifted by 1. */
RELOC_NUMBER (R_390_PLT32DBL, 20) /* 32 bit PC rel. PLT shifted by 1. */
RELOC_NUMBER (R_390_GOTPCDBL, 21) /* 32 bit PC rel. GOT shifted by 1. */
+2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * s390-opc.c (J12_12, J24_24): New macros.
+ (INSTR_MII_UPI): Rename to INSTR_MII_UPP.
+ (MASK_MII_UPI): Rename to MASK_MII_UPP.
+ * s390-opc.txt: Rename MII_UPI to MII_UPP for bprp instruction.
+
2013-07-04 Alan Modra <amodra@gmail.com>
* ppc-opc.c (powerpc_opcodes): Add tdui, twui, tdu, twu, tui, tu.
/* PC-relative address operands. */
-#define J12_12 69 /* PC relative offset at 12 */
+#define J12_12 69 /* 12 bit PC relative offset at 12 */
{ 12, 12, S390_OPERAND_PCREL },
-#define J16_16 70 /* PC relative offset at 16 */
+#define J16_16 70 /* 16 bit PC relative offset at 16 */
{ 16, 16, S390_OPERAND_PCREL },
-#define J16_32 71 /* PC relative offset at 16 */
+#define J16_32 71 /* 16 bit PC relative offset at 32 */
{ 16, 32, S390_OPERAND_PCREL },
-#define J32_16 72 /* PC relative offset at 16 */
+#define J24_24 72 /* 24 bit PC relative offset at 24 */
+ { 24, 24, S390_OPERAND_PCREL },
+#define J32_16 73 /* 32 bit PC relative offset at 16 */
{ 32, 16, S390_OPERAND_PCREL },
+
/* Conditional mask operands. */
-#define M_16OPT 73 /* 4 bit optional mask starting at 16 */
+#define M_16OPT 74 /* 4 bit optional mask starting at 16 */
{ 4, 16, S390_OPERAND_OPTIONAL },
-#define M_20OPT 74 /* 4 bit optional mask starting at 20 */
+#define M_20OPT 75 /* 4 bit optional mask starting at 20 */
{ 4, 20, S390_OPERAND_OPTIONAL },
};
#define INSTR_E 2, { 0,0,0,0,0,0 } /* e.g. pr */
#define INSTR_IE_UU 4, { U4_24,U4_28,0,0,0,0 } /* e.g. niai */
-#define INSTR_MII_UPI 6, { U4_8,J12_12,I24_24 } /* e.g. bprp */
+#define INSTR_MII_UPP 6, { U4_8,J12_12,J24_24 } /* e.g. bprp */
#define INSTR_RIE_RRP 6, { R_8,R_12,J16_16,0,0,0 } /* e.g. brxhg */
#define INSTR_RIE_RRPU 6, { R_8,R_12,U4_32,J16_16,0,0 } /* e.g. crj */
#define INSTR_RIE_RRP0 6, { R_8,R_12,J16_16,0,0,0 } /* e.g. crjne */
#define MASK_E { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_IE_UU { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
-#define MASK_MII_UPI { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_MII_UPP { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RIE_RRP { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RIE_RRPU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
#define MASK_RIE_RRP0 { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
e561 tbeginc SIL_RDU "constrained transaction begin" zEC12 zarch
b2f8 tend S_00 "transaction end" zEC12 zarch
c7 bpp SMI_U0RDP "branch prediction preload" zEC12 zarch
-c5 bprp MII_UPI "branch prediction relative preload" zEC12 zarch
+c5 bprp MII_UPP "branch prediction relative preload" zEC12 zarch
b2e8 ppa RRF_U0RR "perform processor assist" zEC12 zarch
b2fa niai IE_UU "next instruction access intent" zEC12 zarch
b98f crdte RRF_RMRR "compare and replace DAT table entry" zEC12 zarch
projects / binutils-gdb.git / commitdiff