sse.md (avx2_pmaddubsw256, [...]): Add avx512bw alternative.

	* config/i386/sse.md (avx2_pmaddubsw256, ssse3_pmaddubsw128): Add
	avx512bw alternative.

	* gcc.target/i386/avx512bw-vpmaddubsw-3.c: New test.

From-SVN: r236365

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4592bcccbdccfe086966b7aab9e239c2bd6c13e1..9e623c7461aef54755bf635eba64e5b1ae8f6c32 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-05-18  Jakub Jelinek  <jakub@redhat.com>
+
+       * config/i386/sse.md (avx2_pmaddubsw256, ssse3_pmaddubsw128): Add
+       avx512bw alternative.
+
 2016-05-18  Kirill Yukhin  <kirill.yukhin@intel.com>
 
         * gcc/config/i386/sse.md (define_insn "*andnot<mode>3"): Extend static

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index b0d3f81f43d67c48bca029ecdb5d1a8d6fa9eed4..75c3d67921d50a349c9ae5e4a3a92fedc770a8ad 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -13945,12 +13945,12 @@
    (set_attr "mode" "DI")])
 
 (define_insn "avx2_pmaddubsw256"
-  [(set (match_operand:V16HI 0 "register_operand" "=x")
+  [(set (match_operand:V16HI 0 "register_operand" "=x,v")
        (ss_plus:V16HI
          (mult:V16HI
            (zero_extend:V16HI
              (vec_select:V16QI
-               (match_operand:V32QI 1 "register_operand" "x")
+               (match_operand:V32QI 1 "register_operand" "x,v")
                (parallel [(const_int 0) (const_int 2)
                           (const_int 4) (const_int 6)
                           (const_int 8) (const_int 10)
@@ -13961,7 +13961,7 @@
                           (const_int 28) (const_int 30)])))
            (sign_extend:V16HI
              (vec_select:V16QI
-               (match_operand:V32QI 2 "nonimmediate_operand" "xm")
+               (match_operand:V32QI 2 "nonimmediate_operand" "xm,vm")
                (parallel [(const_int 0) (const_int 2)
                           (const_int 4) (const_int 6)
                           (const_int 8) (const_int 10)
@@ -13993,9 +13993,10 @@
                           (const_int 29) (const_int 31)]))))))]
   "TARGET_AVX2"
   "vpmaddubsw\t{%2, %1, %0|%0, %1, %2}"
-  [(set_attr "type" "sseiadd")
+  [(set_attr "isa" "*,avx512bw")
+   (set_attr "type" "sseiadd")
    (set_attr "prefix_extra" "1")
-   (set_attr "prefix" "vex")
+   (set_attr "prefix" "vex,evex")
    (set_attr "mode" "OI")])
 
 ;; The correct representation for this is absolutely enormous, and
@@ -14048,19 +14049,19 @@
    (set_attr "mode" "XI")])
 
 (define_insn "ssse3_pmaddubsw128"
-  [(set (match_operand:V8HI 0 "register_operand" "=x,x")
+  [(set (match_operand:V8HI 0 "register_operand" "=x,x,v")
        (ss_plus:V8HI
          (mult:V8HI
            (zero_extend:V8HI
              (vec_select:V8QI
-               (match_operand:V16QI 1 "register_operand" "0,x")
+               (match_operand:V16QI 1 "register_operand" "0,x,v")
                (parallel [(const_int 0) (const_int 2)
                           (const_int 4) (const_int 6)
                           (const_int 8) (const_int 10)
                           (const_int 12) (const_int 14)])))
            (sign_extend:V8HI
              (vec_select:V8QI
-               (match_operand:V16QI 2 "vector_operand" "xBm,xm")
+               (match_operand:V16QI 2 "vector_operand" "xBm,xm,vm")
                (parallel [(const_int 0) (const_int 2)
                           (const_int 4) (const_int 6)
                           (const_int 8) (const_int 10)
@@ -14081,13 +14082,14 @@
   "TARGET_SSSE3"
   "@
    pmaddubsw\t{%2, %0|%0, %2}
+   vpmaddubsw\t{%2, %1, %0|%0, %1, %2}
    vpmaddubsw\t{%2, %1, %0|%0, %1, %2}"
-  [(set_attr "isa" "noavx,avx")
+  [(set_attr "isa" "noavx,avx,avx512bw")
    (set_attr "type" "sseiadd")
    (set_attr "atom_unit" "simul")
-   (set_attr "prefix_data16" "1,*")
+   (set_attr "prefix_data16" "1,*,*")
    (set_attr "prefix_extra" "1")
-   (set_attr "prefix" "orig,vex")
+   (set_attr "prefix" "orig,vex,evex")
    (set_attr "mode" "TI")])
 
 (define_insn "ssse3_pmaddubsw"

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 88c616418c5176f4950b744dde135115636ea0ec..16db19c4c81ee80c3536439f87aebd1181747b02 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2016-05-18  Jakub Jelinek  <jakub@redhat.com>
+
+       * gcc.target/i386/avx512bw-vpmaddubsw-3.c: New test.
+
 2016-05-18  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/71168

diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddubsw-3.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddubsw-3.c
new file mode 100644 (file)
index 0000000..24252e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpmaddubsw-3.c
@@ -0,0 +1,30 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx512vl -mavx512bw" } */
+
+#include <x86intrin.h>
+
+void
+f1 (__m128i x, __m128i y)
+{
+  register __m128i a __asm ("xmm16"), b __asm ("xmm17");
+  a = x;
+  b = y;
+  asm volatile ("" : "+v" (a), "+v" (b));
+  a = _mm_maddubs_epi16 (a, b);
+  asm volatile ("" : "+v" (a));
+}
+
+/* { dg-final { scan-assembler "vpmaddubsw\[^\n\r]*xmm1\[67]\[^\n\r]*xmm1\[67]\[^\n\r]*xmm1\[67]" } } */
+
+void
+f2 (__m256i x, __m256i y)
+{
+  register __m256i a __asm ("xmm16"), b __asm ("xmm17");
+  a = x;
+  b = y;
+  asm volatile ("" : "+v" (a), "+v" (b));
+  a = _mm256_maddubs_epi16 (a, b);
+  asm volatile ("" : "+v" (a));
+}
+
+/* { dg-final { scan-assembler "vpmaddubsw\[^\n\r]*ymm1\[67]\[^\n\r]*ymm1\[67]\[^\n\r]*ymm1\[67]" } } */