void lower_discard_flow(exec_list *instructions);
bool lower_instructions(exec_list *instructions, unsigned what_to_lower);
bool lower_noise(exec_list *instructions);
-bool lower_variable_index_to_cond_assign(exec_list *instructions,
- bool lower_input, bool lower_output, bool lower_temp, bool lower_uniform);
+bool lower_variable_index_to_cond_assign(gl_shader_stage stage,
+ exec_list *instructions, bool lower_input, bool lower_output,
+ bool lower_temp, bool lower_uniform);
bool lower_quadop_vector(exec_list *instructions, bool dont_lower_swz);
bool lower_const_arrays_to_uniforms(exec_list *instructions);
bool lower_clip_distance(gl_shader *shader);
class variable_index_to_cond_assign_visitor : public ir_rvalue_visitor {
public:
- variable_index_to_cond_assign_visitor(bool lower_input,
- bool lower_output,
- bool lower_temp,
- bool lower_uniform)
+ variable_index_to_cond_assign_visitor(gl_shader_stage stage,
+ bool lower_input,
+ bool lower_output,
+ bool lower_temp,
+ bool lower_uniform)
{
this->progress = false;
+ this->stage = stage;
this->lower_inputs = lower_input;
this->lower_outputs = lower_output;
this->lower_temps = lower_temp;
}
bool progress;
+
+ gl_shader_stage stage;
bool lower_inputs;
bool lower_outputs;
bool lower_temps;
case ir_var_auto:
case ir_var_temporary:
return this->lower_temps;
+
case ir_var_uniform:
case ir_var_shader_storage:
return this->lower_uniforms;
+
case ir_var_function_in:
case ir_var_const_in:
return this->lower_temps;
+
case ir_var_shader_in:
+ /* The input array size is unknown at compiler time for non-patch
+ * inputs in TCS and TES. The arrays are sized to
+ * the implementation-dependent limit "gl_MaxPatchVertices", but
+ * the real size is stored in the "gl_PatchVerticesIn" built-in
+ * uniform.
+ *
+ * The TCS input array size is specified by
+ * glPatchParameteri(GL_PATCH_VERTICES).
+ *
+ * The TES input array size is specified by the "vertices" output
+ * layout qualifier in TCS.
+ */
+ if ((stage == MESA_SHADER_TESS_CTRL ||
+ stage == MESA_SHADER_TESS_EVAL) && !var->data.patch)
+ return false;
return this->lower_inputs;
+
case ir_var_function_out:
+ /* TCS non-patch outputs can only be indexed with "gl_InvocationID".
+ * Other expressions are not allowed.
+ */
+ if (stage == MESA_SHADER_TESS_CTRL && !var->data.patch)
+ return false;
return this->lower_temps;
+
case ir_var_shader_out:
return this->lower_outputs;
+
case ir_var_function_inout:
return this->lower_temps;
}
} /* anonymous namespace */
bool
-lower_variable_index_to_cond_assign(exec_list *instructions,
- bool lower_input,
- bool lower_output,
- bool lower_temp,
- bool lower_uniform)
+lower_variable_index_to_cond_assign(gl_shader_stage stage,
+ exec_list *instructions,
+ bool lower_input,
+ bool lower_output,
+ bool lower_temp,
+ bool lower_uniform)
{
- variable_index_to_cond_assign_visitor v(lower_input,
- lower_output,
- lower_temp,
- lower_uniform);
+ variable_index_to_cond_assign_visitor v(stage,
+ lower_input,
+ lower_output,
+ lower_temp,
+ lower_uniform);
/* Continue lowering until no progress is made. If there are multiple
* levels of indirection (e.g., non-constant indexing of array elements and
} else if (sscanf(optimization, "lower_variable_index_to_cond_assign "
"( %d , %d , %d , %d ) ", &int_0, &int_1, &int_2,
&int_3) == 4) {
- return lower_variable_index_to_cond_assign(ir, int_0 != 0, int_1 != 0,
+ return lower_variable_index_to_cond_assign(MESA_SHADER_VERTEX, ir,
+ int_0 != 0, int_1 != 0,
int_2 != 0, int_3 != 0);
} else if (sscanf(optimization, "lower_quadop_vector ( %d ) ",
&int_0) == 1) {
}
static void
-process_glsl_ir(struct brw_context *brw,
+process_glsl_ir(gl_shader_stage stage,
+ struct brw_context *brw,
struct gl_shader_program *shader_prog,
struct gl_shader *shader)
{
lower_quadop_vector(shader->ir, false);
bool lowered_variable_indexing =
- lower_variable_index_to_cond_assign(shader->ir,
+ lower_variable_index_to_cond_assign((gl_shader_stage)stage,
+ shader->ir,
options->EmitNoIndirectInput,
options->EmitNoIndirectOutput,
options->EmitNoIndirectTemp,
_mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
- process_glsl_ir(brw, shProg, shader);
+ process_glsl_ir((gl_shader_stage) stage, brw, shProg, shader);
/* Make a pass over the IR to add state references for any built-in
* uniforms that are used. This has to be done now (during linking).
if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput
|| options->EmitNoIndirectTemp || options->EmitNoIndirectUniform)
progress =
- lower_variable_index_to_cond_assign(ir,
+ lower_variable_index_to_cond_assign(prog->_LinkedShaders[i]->Stage, ir,
options->EmitNoIndirectInput,
options->EmitNoIndirectOutput,
options->EmitNoIndirectTemp,
*/
if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
- lower_variable_index_to_cond_assign(ir,
+ lower_variable_index_to_cond_assign(prog->_LinkedShaders[i]->Stage, ir,
options->EmitNoIndirectInput,
options->EmitNoIndirectOutput,
options->EmitNoIndirectTemp,