[(set_attr "type" "*,load,*,*,*,*,*,mtjmpr,*")])
(define_insn ""
- [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m,r,r,r,*h")
- (match_operand:SI 1 "input_operand" "r,m,r,I,J,*h,r"))]
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m,r,r,r,*h,*h")
+ (match_operand:SI 1 "input_operand" "r,m,r,I,J,*h,r,0"))]
"! TARGET_POWER && (gpc_reg_operand (operands[0], SImode)
|| gpc_reg_operand (operands[1], SImode))"
"@
li %0,%1
lis %0,%u1
mf%1 %0
- mt%0 %1"
- [(set_attr "type" "*,load,*,*,*,*,mtjmpr")])
+ mt%0 %1
+ cror 0,0,0"
+ [(set_attr "type" "*,load,*,*,*,*,mtjmpr,*")])
;; Split a load of a large constant into the appropriate two-insn
;; sequence.
}")
(define_insn ""
- [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,*h,*h")
- (match_operand:HI 1 "input_operand" "r,m,r,i,*h,r,0"))]
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,*q,*c*l,*h")
+ (match_operand:HI 1 "input_operand" "r,m,r,i,*h,r,r,0"))]
"TARGET_POWER && (gpc_reg_operand (operands[0], HImode)
|| gpc_reg_operand (operands[1], HImode))"
"@
{cal %0,%w1(0)|li %0,%w1}
mf%1 %0
mt%0 %1
+ mt%0 %1
cror 0,0,0"
- [(set_attr "type" "*,load,*,*,*,*,*")])
+ [(set_attr "type" "*,load,*,*,*,*,mtjmpr,*")])
(define_insn ""
- [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,*h")
- (match_operand:HI 1 "input_operand" "r,m,r,i,*h,r"))]
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,*h,*h")
+ (match_operand:HI 1 "input_operand" "r,m,r,i,*h,r,0"))]
"! TARGET_POWER && (gpc_reg_operand (operands[0], HImode)
|| gpc_reg_operand (operands[1], HImode))"
"@
sth%U0%X0 %1,%0
li %0,%w1
mf%1 %0
- mt%0 %1"
- [(set_attr "type" "*,load,*,*,*,*")])
+ mt%0 %1
+ cror 0,0,0"
+ [(set_attr "type" "*,load,*,*,*,mtjmpr,*")])
(define_expand "movqi"
[(set (match_operand:QI 0 "general_operand" "")
}")
(define_insn ""
- [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,*h,*h")
- (match_operand:QI 1 "input_operand" "r,m,r,i,*h,r,0"))]
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,*q,*c*l,*h")
+ (match_operand:QI 1 "input_operand" "r,m,r,i,*h,r,r,0"))]
"TARGET_POWER && (gpc_reg_operand (operands[0], QImode)
|| gpc_reg_operand (operands[1], QImode))"
"@
{cal %0,%1(0)|li %0,%1}
mf%1 %0
mt%0 %1
+ mt%0 %1
cror 0,0,0"
- [(set_attr "type" "*,load,*,*,*,*,*")])
+ [(set_attr "type" "*,load,*,*,*,*,mtjmpr,*")])
(define_insn ""
- [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,*h")
- (match_operand:QI 1 "input_operand" "r,m,r,i,*h,r"))]
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,*h,*h")
+ (match_operand:QI 1 "input_operand" "r,m,r,i,*h,r,0"))]
"! TARGET_POWER && (gpc_reg_operand (operands[0], QImode)
|| gpc_reg_operand (operands[1], QImode))"
"@
stb%U0%X0 %1,%0
li %0,%1
mf%1 %0
- mt%0 %1"
- [(set_attr "type" "*,load,*,*,*,*")])
+ mt%0 %1
+ cror 0,0,0"
+ [(set_attr "type" "*,load,*,*,*,mtjmpr,*")])
\f
;; Here is how to move condition codes around. When we store CC data in
;; an integer register or memory, we store just the high-order 4 bits.