+2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/x86-64-inval.s: cmpxchg16b needs oword ptr, instead
+ of xmmword ptr.
+ * gas/i386/x86_64.s: Likewise.
+ * gas/i386/x86-64-inval.l: Updated.
+
2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-inval.s: Add cmpxchg16b.
51 [ ]*retl # can't have 32-bit stack operands
52 [ ]*insertq \$4,\$2,%xmm2,%ebx # The last operand must be XMM register.
53 [ ]*.intel_syntax noprefix
- 54 [ ]*cmpxchg16b dword ptr \[rax\] # Must be xmmword
+ 54 [ ]*cmpxchg16b dword ptr \[rax\] # Must be oword
retl # can't have 32-bit stack operands
insertq $4,$2,%xmm2,%ebx # The last operand must be XMM register.
.intel_syntax noprefix
- cmpxchg16b dword ptr [rax] # Must be xmmword
+ cmpxchg16b dword ptr [rax] # Must be oword
cmpxchg16b (%rax)
.intel_syntax noprefix
-cmpxchg16b xmmword ptr [rax]
+cmpxchg16b oword ptr [rax]
# Get a good alignment.
.p2align 4,0
+2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (o_mode): New for 16-byte operand.
+ (intel_operand_size): Generate "OWORD PTR " for o_mode.
+ (CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
+
2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CMPXCHG8B_Fixup): New.
#define const_1_mode 14
#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
#define z_mode 16 /* non-quad operand size depends on prefixes */
+#define o_mode 17 /* 16-byte operand */
#define es_reg 100
#define cs_reg 101
case x_mode:
oappend ("XMMWORD PTR ");
break;
+ case o_mode:
+ oappend ("OWORD PTR ");
+ break;
default:
break;
}
/* Change cmpxchg8b to cmpxchg16b. */
char *p = obuf + strlen (obuf) - 2;
strcpy (p, "16b");
- bytemode = x_mode;
+ bytemode = o_mode;
}
OP_M (bytemode, sizeflag);
}