Power/GAS: Don't set VLE annotation for non-VLE processors/instructions

Only set the VLE flag if the instruction has been pulled via the VLE
instruction set.  This way the flag is guaranteed to be set for VLE-only
instructions or for VLE-only processors, however it'll remain clear for
dual-mode instructions on dual-mode and, more importantly, standard-mode
processors.

	gas/
	* config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE
	flag if both the processor and opcode flags match.

	ld/testsuite/
	* ld-powerpc/apuinfo-vle.rd: New test.
	* ld-powerpc/apuinfo-vle.s: New test source.
	* ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE
	handling change.
	* ld-powerpc/powerpc.exp: Run the new test.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 6c4e6b8e1ddb68a4693c77ce1d68187c47281bb6..b97523f6a3d897fdad2406a3d4aea1a8ea9d79fe 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2014-08-22  Maciej W. Rozycki  <macro@codesourcery.com>
+
+       * config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE
+       flag if both the processor and opcode flags match.
+
 2014-08-22  Maciej W. Rozycki  <macro@codesourcery.com>
 
        * config/tc-arm.c (add_to_lit_pool): Preinitialize `imm1'.

diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index ff4ea646de09e01563c8a3e693e3b3a1637b391b..189a22baf541e490383146318ee5064ca8370b3b 100644 (file)
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -3369,7 +3369,12 @@ md_assemble (char *str)
        ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
       if (opcode->flags & PPC_OPCODE_RFMCI)
        ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
-      if (opcode->flags & PPC_OPCODE_VLE)
+      /* Only set the VLE flag if the instruction has been pulled via
+         the VLE instruction set.  This way the flag is guaranteed to
+         be set for VLE-only instructions or for VLE-only processors,
+         however it'll remain clear for dual-mode instructions on
+         dual-mode and, more importantly, standard-mode processors.  */
+      if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
        ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
     }
 #endif

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 6ef84a010e6405c164e06fa79e112fc0077651a3..ac09b8d5d58117d9d755080fd06fc056f5b80c97 100644 (file)
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2014-08-22  Maciej W. Rozycki  <macro@codesourcery.com>
+
+       * ld-powerpc/apuinfo-vle.rd: New test.
+       * ld-powerpc/apuinfo-vle.s: New test source.
+       * ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE
+       handling change.
+       * ld-powerpc/powerpc.exp: Run the new test.
+
 2014-08-21  Tony Wang  <tony.wang@arm.com>
 
        * ld-arm/jump-reloc-veneers-cond.s: New test.

diff --git a/ld/testsuite/ld-powerpc/apuinfo-vle.rd b/ld/testsuite/ld-powerpc/apuinfo-vle.rd
new file mode 100644 (file)
index 0000000..79a0910
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/apuinfo-vle.rd
@@ -0,0 +1,5 @@
+Hex dump of section '\.PPC\.EMB\.apuinfo':
+  0x00000000 (?:00000008|08000000) (?:00000020|20000000) (?:00000002|02000000) 41505569 .*APUi
+  0x00000010 6e666f00 (?:00420001|01004200) (?:00430001|01004300) (?:00410001|01004100) nfo.*
+  0x00000020 (?:01020001|01000201) (?:01040001|01000401) (?:01010001|01000101) (?:00400001|01004000) .*
+  0x00000030 01000001                            .*

diff --git a/ld/testsuite/ld-powerpc/apuinfo-vle.s b/ld/testsuite/ld-powerpc/apuinfo-vle.s
new file mode 100644 (file)
index 0000000..06bfec9
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/apuinfo-vle.s
@@ -0,0 +1,4 @@
+       .text
+       .global apuinfo_vle
+apuinfo_vle:
+       se_blr

diff --git a/ld/testsuite/ld-powerpc/apuinfo.rd b/ld/testsuite/ld-powerpc/apuinfo.rd
index 3c075165f156c0428c58156a51c53702f1f00ee1..4443638c6e94a3dbd1cffa2c8be16eb2d12d22b7 100644 (file)
--- a/ld/testsuite/ld-powerpc/apuinfo.rd
+++ b/ld/testsuite/ld-powerpc/apuinfo.rd
@@ -6,7 +6,6 @@
 #target: powerpc-eabi*
 
 Hex dump of section '.PPC.EMB.apuinfo':
-  0x00000000 (00000008|08000000) (00000020|20000000) (00000002|02000000) 41505569 .*APUi
+  0x00000000 (00000008|08000000) (0000001c|1c000000) (00000002|02000000) 41505569 .*APUi
   0x00000010 6e666f00 (00420001|01004200) (00430001|01004300) (00410001|01004100) nfo.*
-  0x00000020 (01020001|01000201) (01010001|01000101) (00400001|01004000) (01040001|01000401) .*
-  0x00000030 01000001                            .*
+  0x00000020 (01020001|01000201) (01010001|01000101) (00400001|01004000) 01000001 .*

diff --git a/ld/testsuite/ld-powerpc/powerpc.exp b/ld/testsuite/ld-powerpc/powerpc.exp
index 23572c69a451f4105113f28cc24ffd308494f8e4..599b980f1f411550d39cd2c4358f5f88e3aa5c73 100644 (file)
--- a/ld/testsuite/ld-powerpc/powerpc.exp
+++ b/ld/testsuite/ld-powerpc/powerpc.exp
@@ -102,10 +102,13 @@ set ppcelftests {
      {{objdump -hw reloc.d}} "reloc.so"}
     {"APUinfo section processing" "-melf32ppc" ""
      "-a32 -me500" {apuinfo1.s apuinfo-nul.s apuinfo2.s}
-    {{readelf -x2 apuinfo.rd}} "apuinfo"}
+     {{readelf -x2 apuinfo.rd}} "apuinfo"}
+    {"APUinfo VLE section processing" "-melf32ppc" ""
+     "-a32 -me500 -mvle" {apuinfo1.s apuinfo-vle.s apuinfo2.s}
+     {{readelf -x2 apuinfo-vle.rd}} "apuinfo-vle"}
     {"APUinfo NULL section processing" "-melf32ppc" ""
      "-a32 -me500" {apuinfo-nul1.s apuinfo-nul.s}
-    {{readelf -x2 apuinfo-nul.rd}} "apuinfo"}
+     {{readelf -x2 apuinfo-nul.rd}} "apuinfo"}
     {"TLS32 static exec" "-melf32ppc" "" "-a32"  {tls32.s tlslib32.s}
      {{objdump -dr tls32.d} {objdump -sj.got tls32.g}
       {objdump -sj.tdata tls32.t}}