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cxxrtl: don't reset elided wires with \init attribute.
author
Catherine
<whitequark@whitequark.org>
Sat, 25 Dec 2021 01:06:10 +0000
(
01:06
+0000)
committer
Catherine
<whitequark@whitequark.org>
Sat, 25 Dec 2021 01:06:10 +0000
(
01:06
+0000)
backends/cxxrtl/cxxrtl_backend.cc
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diff --git
a/backends/cxxrtl/cxxrtl_backend.cc
b/backends/cxxrtl/cxxrtl_backend.cc
index ba11179c65ef75dcf4474de8fde8f353e32dbdb5..7a336f8c10d25d0a2819c1eeb7ec4cb014ffc6cb 100644
(file)
--- a/
backends/cxxrtl/cxxrtl_backend.cc
+++ b/
backends/cxxrtl/cxxrtl_backend.cc
@@
-1838,6
+1838,8
@@
struct CxxrtlWorker {
int mem_init_idx = 0;
inc_indent();
for (auto wire : module->wires()) {
+ const auto &wire_type = wire_types[wire];
+ if (!wire_type.is_named() || wire_type.is_local()) continue;
if (!wire_init.count(wire)) continue;
f << indent << mangle(wire) << " = ";