sim: frv: fix compiler parentheses suggestions warnings
authorMike Frysinger <vapier@gentoo.org>
Sat, 29 May 2021 16:20:20 +0000 (12:20 -0400)
committerMike Frysinger <vapier@gentoo.org>
Sat, 29 May 2021 17:07:34 +0000 (13:07 -0400)
Newer gcc warns when writing statements like (a && b || c && d),
so add more parentheses to make it (and the reader) happy.

sim/frv/ChangeLog
sim/frv/cache.c
sim/frv/memory.c
sim/frv/traps.c

index d94526a4594b696768d1f3828d083e56dcb1ca4d..348308d7b64e75e80225dc47da59b6e2c863ee45 100644 (file)
@@ -1,3 +1,16 @@
+2021-05-29  Mike Frysinger  <vapier@gentoo.org>
+
+       * cache.c (non_cache_access): Add parentheses.
+       * memory.c (fr500_check_data_read_address): Likewise.
+       (fr550_check_data_read_address): Likewise.
+       (fr500_check_readwrite_address): Likewise.
+       (fr550_check_readwrite_address): Likewise.
+       (fr500_check_insn_read_address): Likewise.
+       (fr500_check_write_address): Likewise.
+       (fr550_check_write_address): Likewise.
+       * traps.c (frv_mtrap): Likewise.
+       (frvbf_commit): Likewise.
+
 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
 
        * sim-main.h (struct sim_state): Delete.
index e569d5239dec6b23ca4b2535e23554204add6d4b..5c7700354fe4a2b8172fbfae2a67163d5b822584 100644 (file)
@@ -211,12 +211,12 @@ non_cache_access (FRV_CACHE *cache, USI address)
     case bfd_mach_fr400:
     case bfd_mach_fr450:
       if (address >= 0xff000000
-         || address >= 0xfe000000 && address <= 0xfeffffff)
+         || (address >= 0xfe000000 && address <= 0xfeffffff))
        return 1; /* non-cache access */
       break;
     case bfd_mach_fr550:
       if (address >= 0xff000000
-         || address >= 0xfeff0000 && address <= 0xfeffffff)
+         || (address >= 0xfeff0000 && address <= 0xfeffffff))
        return 1; /* non-cache access */
       if (cache == CPU_INSN_CACHE (current_cpu))
        {
@@ -228,7 +228,7 @@ non_cache_access (FRV_CACHE *cache, USI address)
       break;
     default:
       if (address >= 0xff000000
-         || address >= 0xfeff0000 && address <= 0xfeffffff)
+         || (address >= 0xfeff0000 && address <= 0xfeffffff))
        return 1; /* non-cache access */
       if (cache == CPU_INSN_CACHE (current_cpu))
        {
index 681fea49c84772995f40eb1a455c3db332880793..a226cd21060611a7797b02be10ba8fb04b6b7191 100644 (file)
@@ -51,8 +51,8 @@ fr500_check_data_read_address (SIM_CPU *current_cpu, SI address, int align_mask)
       address &= ~align_mask;
     }
 
-  if ((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff
-      || (USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff)
+  if (((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff)
+      || ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff))
     frv_queue_data_access_error_interrupt (current_cpu, address);
 
   return address;
@@ -61,7 +61,7 @@ fr500_check_data_read_address (SIM_CPU *current_cpu, SI address, int align_mask)
 static SI
 fr550_check_data_read_address (SIM_CPU *current_cpu, SI address, int align_mask)
 {
-  if ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff
+  if (((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff)
       || (align_mask > 0x3
          && ((USI)address >= 0xfeff0000 && (USI)address <= 0xfeffffff)))
     frv_queue_data_access_error_interrupt (current_cpu, address);
@@ -118,10 +118,10 @@ fr400_check_readwrite_address (SIM_CPU *current_cpu, SI address, int align_mask)
 static SI
 fr500_check_readwrite_address (SIM_CPU *current_cpu, SI address, int align_mask)
 {
-  if ((USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff
-      || (USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff
-      || (USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff
-      || (USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff)
+  if (((USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff)
+      || ((USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff)
+      || ((USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff)
+      || ((USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff))
     frv_queue_data_access_exception_interrupt (current_cpu);
 
   return address;
@@ -132,14 +132,14 @@ fr550_check_readwrite_address (SIM_CPU *current_cpu, SI address, int align_mask)
 {
   /* No alignment restrictions on fr550 */
 
-  if ((USI)address >= 0xfe000000 && (USI)address <= 0xfe3fffff
-      || (USI)address >= 0xfe408000 && (USI)address <= 0xfe7fffff)
+  if (((USI)address >= 0xfe000000 && (USI)address <= 0xfe3fffff)
+      || ((USI)address >= 0xfe408000 && (USI)address <= 0xfe7fffff))
     frv_queue_data_access_exception_interrupt (current_cpu);
   else
     {
       USI hsr0 = GET_HSR0 ();
       if (! GET_HSR0_RME (hsr0)
-         && (USI)address >= 0xfe400000 && (USI)address <= 0xfe407fff)
+         && ((USI)address >= 0xfe400000 && (USI)address <= 0xfe407fff))
        frv_queue_data_access_exception_interrupt (current_cpu);
     }
 
@@ -199,18 +199,18 @@ fr500_check_insn_read_address (SIM_CPU *current_cpu, PCADDR address,
       address &= ~align_mask;
     }
 
-  if ((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff
-      || (USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff)
+  if (((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff)
+      || ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff))
     frv_queue_instruction_access_error_interrupt (current_cpu);
-  else if ((USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff
-          || (USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff
-          || (USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff)
+  else if (((USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff)
+          || ((USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff)
+          || ((USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff))
     frv_queue_instruction_access_exception_interrupt (current_cpu);
   else
     {
       USI hsr0 = GET_HSR0 ();
       if (! GET_HSR0_RME (hsr0)
-         && (USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff)
+         && ((USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff))
        frv_queue_instruction_access_exception_interrupt (current_cpu);
     }
 
@@ -704,8 +704,8 @@ fr500_check_write_address (SIM_CPU *current_cpu, SI address, int align_mask)
        item->slot = frv_interrupt_state.slot;
       address &= ~align_mask;
     }
-  if (address >= 0xfeff0600 && address <= 0xfeff7fff
-      || address >= 0xfe800000 && address <= 0xfefeffff)
+  if ((address >= 0xfeff0600 && address <= 0xfeff7fff)
+      || (address >= 0xfe800000 && address <= 0xfefeffff))
     frv_queue_program_interrupt (current_cpu, FRV_DATA_STORE_ERROR);
 
   return address;
@@ -714,7 +714,7 @@ fr500_check_write_address (SIM_CPU *current_cpu, SI address, int align_mask)
 static SI
 fr550_check_write_address (SIM_CPU *current_cpu, SI address, int align_mask)
 {
-  if ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff
+  if (((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff)
       || (align_mask > 0x3
          && ((USI)address >= 0xfeff0000 && (USI)address <= 0xfeffffff)))
     frv_queue_program_interrupt (current_cpu, FRV_DATA_STORE_ERROR);
index 25b4e3eea25ec2c614efd61815679313f22e2118..d5cab2496226e4767282b692852693f23c45c2e8 100644 (file)
@@ -275,7 +275,8 @@ frv_mtrap (SIM_CPU *current_cpu)
 
   /* Check the status of media exceptions in MSR0.  */
   SI msr = GET_MSR (0);
-  if (GET_MSR_AOVF (msr) || GET_MSR_MTT (msr) && STATE_ARCHITECTURE (sd)->mach != bfd_mach_fr550)
+  if (GET_MSR_AOVF (msr)
+      || (GET_MSR_MTT (msr) && STATE_ARCHITECTURE (sd)->mach != bfd_mach_fr550))
     frv_queue_program_interrupt (current_cpu, FRV_MP_EXCEPTION);
 }
 
@@ -922,8 +923,8 @@ frvbf_commit (SIM_CPU *current_cpu, SI target_index, BI is_float)
     NE_flag = GET_NE_FLAG (NE_flags, target_index);
   else
     {
-      NE_flag =
-       hi_available && NE_flags[0] != 0 || lo_available && NE_flags[1] != 0;
+      NE_flag = (hi_available && NE_flags[0] != 0)
+               || (lo_available && NE_flags[1] != 0);
     }
 
   /* Always clear the appropriate NE flags.  */