+2021-05-29 Mike Frysinger <vapier@gentoo.org>
+
+ * cache.c (non_cache_access): Add parentheses.
+ * memory.c (fr500_check_data_read_address): Likewise.
+ (fr550_check_data_read_address): Likewise.
+ (fr500_check_readwrite_address): Likewise.
+ (fr550_check_readwrite_address): Likewise.
+ (fr500_check_insn_read_address): Likewise.
+ (fr500_check_write_address): Likewise.
+ (fr550_check_write_address): Likewise.
+ * traps.c (frv_mtrap): Likewise.
+ (frvbf_commit): Likewise.
+
2021-05-17 Mike Frysinger <vapier@gentoo.org>
* sim-main.h (struct sim_state): Delete.
case bfd_mach_fr400:
case bfd_mach_fr450:
if (address >= 0xff000000
- || address >= 0xfe000000 && address <= 0xfeffffff)
+ || (address >= 0xfe000000 && address <= 0xfeffffff))
return 1; /* non-cache access */
break;
case bfd_mach_fr550:
if (address >= 0xff000000
- || address >= 0xfeff0000 && address <= 0xfeffffff)
+ || (address >= 0xfeff0000 && address <= 0xfeffffff))
return 1; /* non-cache access */
if (cache == CPU_INSN_CACHE (current_cpu))
{
break;
default:
if (address >= 0xff000000
- || address >= 0xfeff0000 && address <= 0xfeffffff)
+ || (address >= 0xfeff0000 && address <= 0xfeffffff))
return 1; /* non-cache access */
if (cache == CPU_INSN_CACHE (current_cpu))
{
address &= ~align_mask;
}
- if ((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff
- || (USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff)
+ if (((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff)
+ || ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff))
frv_queue_data_access_error_interrupt (current_cpu, address);
return address;
static SI
fr550_check_data_read_address (SIM_CPU *current_cpu, SI address, int align_mask)
{
- if ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff
+ if (((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff)
|| (align_mask > 0x3
&& ((USI)address >= 0xfeff0000 && (USI)address <= 0xfeffffff)))
frv_queue_data_access_error_interrupt (current_cpu, address);
static SI
fr500_check_readwrite_address (SIM_CPU *current_cpu, SI address, int align_mask)
{
- if ((USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff
- || (USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff
- || (USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff
- || (USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff)
+ if (((USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff)
+ || ((USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff)
+ || ((USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff)
+ || ((USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff))
frv_queue_data_access_exception_interrupt (current_cpu);
return address;
{
/* No alignment restrictions on fr550 */
- if ((USI)address >= 0xfe000000 && (USI)address <= 0xfe3fffff
- || (USI)address >= 0xfe408000 && (USI)address <= 0xfe7fffff)
+ if (((USI)address >= 0xfe000000 && (USI)address <= 0xfe3fffff)
+ || ((USI)address >= 0xfe408000 && (USI)address <= 0xfe7fffff))
frv_queue_data_access_exception_interrupt (current_cpu);
else
{
USI hsr0 = GET_HSR0 ();
if (! GET_HSR0_RME (hsr0)
- && (USI)address >= 0xfe400000 && (USI)address <= 0xfe407fff)
+ && ((USI)address >= 0xfe400000 && (USI)address <= 0xfe407fff))
frv_queue_data_access_exception_interrupt (current_cpu);
}
address &= ~align_mask;
}
- if ((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff
- || (USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff)
+ if (((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff)
+ || ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff))
frv_queue_instruction_access_error_interrupt (current_cpu);
- else if ((USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff
- || (USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff
- || (USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff)
+ else if (((USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff)
+ || ((USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff)
+ || ((USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff))
frv_queue_instruction_access_exception_interrupt (current_cpu);
else
{
USI hsr0 = GET_HSR0 ();
if (! GET_HSR0_RME (hsr0)
- && (USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff)
+ && ((USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff))
frv_queue_instruction_access_exception_interrupt (current_cpu);
}
item->slot = frv_interrupt_state.slot;
address &= ~align_mask;
}
- if (address >= 0xfeff0600 && address <= 0xfeff7fff
- || address >= 0xfe800000 && address <= 0xfefeffff)
+ if ((address >= 0xfeff0600 && address <= 0xfeff7fff)
+ || (address >= 0xfe800000 && address <= 0xfefeffff))
frv_queue_program_interrupt (current_cpu, FRV_DATA_STORE_ERROR);
return address;
static SI
fr550_check_write_address (SIM_CPU *current_cpu, SI address, int align_mask)
{
- if ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff
+ if (((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff)
|| (align_mask > 0x3
&& ((USI)address >= 0xfeff0000 && (USI)address <= 0xfeffffff)))
frv_queue_program_interrupt (current_cpu, FRV_DATA_STORE_ERROR);