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diff --git a/openpower/ISA_WG/Board_letter_26mar2021.mdwn b/openpower/ISA_WG/Board_letter_26mar2021.mdwn
index bcfa3882a6046b2dd932e87036ec6c5c5943982c..6bbd16ed00c3011bb1ce2c4a9f651f0bb925e2f6 100644 (file)
--- a/openpower/ISA_WG/Board_letter_26mar2021.mdwn
+++ b/openpower/ISA_WG/Board_letter_26mar2021.mdwn
@@ -13,3 +13,11 @@ Dear OPF Board,
 
 As you know the LibreSOC team have been working for over 3 years on a massive conceptual upgrade to the OpenPOWER ISA, based on Cray-Style Vectors, which will modernise it for today's 3D and VPU workloads, with an incidental side-effect of upgrading it for future supercomputing needs.  RISC-V has RVV, ARM has SVE2, x86 has AVX512, whilst OpenPOWER has an out-of-date SIMD ISA. It goes without saying that over the decades, SIMD has been demonstrated to be harmful.
 https://www.sigarch.org/simd-instructions-considered-harmful/
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+Normally, such huge ISA development efforts would be instigated, organised and funded through either Academia or an extremely large Corporation, or a Consortium combining multiple such entities.  It is therefore without precedent across the Computing Industry for something of this magnitude of effort to come not only from a Libre background but from a Libre background that is funded by a Charitable Foundation with a mandate to fund "Works for the Public Good".
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+From reading the PowerISA v3.0C sections we have learned and taken on board that a "Sandbox" opcode exists (EXT22) which is intended for "small private extensions" to the OpenPOWER ISA.  Our Bitmanipulation Extension, needed for Audio/Video and cryptographic workloads, struggles to fit into that space, and we have not yet added Custom 3D opcodes or the IEEE754 Transcendentals (SIN, COS) 
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+In speaking with various people (Toshaan, Paul and Hugh) we have pieced together the way that the Op
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