+2018-06-20 Nick Clifton <nickc@redhat.com>
+
+ PR 21458
+ * tc-arm.c (do_adr): Only set the bottom bit of an imported thumb
+ function symbol address if -mthumb-interwork is active.
+ (do_adrl): Likewise.
+ * doc/c-arm.texi: Update descriptions of the -mthumb-interwork
+ option and the ADR and ADRL pseudo-ops.
+ * NEWS: Mention the new behaviour of the ADR and ADRL pseudo-ops.
+ * testsuite/gas/arm/pr21458.d: Add -mthumb-interwork option to
+ assembler command line.
+ * testsuite/gas/arm/adr.d: Likewise.
+ * testsuite/gas/arm/adrl.d: Likewise.
+
2018-06-20 Sebastian Huber <sebastian.huber@embedded-brains.de>
PR gas/23305
-*- text -*-
+* The ADR and ADRL pseudo-instructions supported by the ARM assembler
+ now only set the bottom bit of the address of thumb function symbols
+ if the -mthumb-interwork command line option is active.
+
* Add support for the MIPS Global INValidate (GINV) ASE.
* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
inst.reloc.pc_rel = 1;
inst.reloc.exp.X_add_number -= 8;
- if (inst.reloc.exp.X_op == O_symbol
+ if (support_interwork
+ && inst.reloc.exp.X_op == O_symbol
&& inst.reloc.exp.X_add_symbol != NULL
&& S_IS_DEFINED (inst.reloc.exp.X_add_symbol)
&& THUMB_IS_FUNC (inst.reloc.exp.X_add_symbol))
- inst.reloc.exp.X_add_number += 1;
+ inst.reloc.exp.X_add_number |= 1;
}
/* This is a pseudo-op of the form "adrl rd, label" to be converted
inst.size = INSN_SIZE * 2;
inst.reloc.exp.X_add_number -= 8;
- if (inst.reloc.exp.X_op == O_symbol
+ if (support_interwork
+ && inst.reloc.exp.X_op == O_symbol
&& inst.reloc.exp.X_add_symbol != NULL
&& S_IS_DEFINED (inst.reloc.exp.X_add_symbol)
&& THUMB_IS_FUNC (inst.reloc.exp.X_add_symbol))
- inst.reloc.exp.X_add_number += 1;
+ inst.reloc.exp.X_add_number |= 1;
}
static void
@cindex @code{-mthumb-interwork} command line option, ARM
@item -mthumb-interwork
This option specifies that the output generated by the assembler should
-be marked as supporting interworking.
+be marked as supporting interworking. It also affects the behaviour
+of the @code{ADR} and @code{ADRL} pseudo opcodes.
@cindex @code{-mimplicit-it} command line option, ARM
@item -mimplicit-it=never
the ADR instruction, then an error will be generated. This instruction
will not make use of the literal pool.
+If @var{label} is a thumb function symbol, and thumb interworking has
+been enabled via the @option{-mthumb-interwork} option then the bottom
+bit of the value stored into @var{register} will be set. This allows
+the following sequence to work as expected:
+
+@smallexample
+ adr r0, thumb_function
+ blx r0
+@end smallexample
+
@cindex @code{ADRL reg,<label>} pseudo op, ARM
@item ADRL
@smallexample
(and section) as the ADRL instruction, then an error will be generated.
This instruction will not make use of the literal pool.
+If @var{label} is a thumb function symbol, and thumb interworking has
+been enabled via the @option{-mthumb-interwork} option then the bottom
+bit of the value stored into @var{register} will be set.
+
@end table
For information on the ARM or Thumb instruction sets, see @cite{ARM
+#as: -mthumb-interwork
#objdump: -dr --prefix-addresses --show-raw-insn
#name: ADR
+#as: -mthumb-interwork
#objdump: -dr --prefix-addresses --show-raw-insn
#name: ADRL
+#as: -mthumb-interwork
#objdump: -d --prefix-addresses --show-raw-insn
#name: ADR(L) for Thumb functions
#skip: *-*-pe *-wince-* *-*-vxworks
-# Test that using ADR(L) on thumb function symbols sets the T bit.
+# Test that using ADR(L) on thumb function symbols sets the T bit when -mthumb-interwork is active.
.*: +file format .*arm.*