+2016-09-21 Yao Qi <yao.qi@linaro.org>
+
+ * aarch32-linux-nat.c (aarch32_gp_regcache_collect): Keep
+ bits 20 to 23.
+
2016-09-20 Tom Tromey <tom@tromey.com>
* python/py-value.c (convert_value_from_python): Make PyInt_Check
if (arm_apcs_32
&& REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
- regcache_raw_collect (regcache, ARM_PS_REGNUM,
- ®s[ARM_CPSR_GREGNUM]);
+ {
+ uint32_t cpsr = regs[ARM_CPSR_GREGNUM];
+
+ regcache_raw_collect (regcache, ARM_PS_REGNUM,
+ ®s[ARM_CPSR_GREGNUM]);
+ /* Keep reserved bits bit 20 to bit 23. */
+ regs[ARM_CPSR_GREGNUM] = ((regs[ARM_CPSR_GREGNUM] & 0xff0fffff)
+ | (cpsr & 0x00f00000));
+ }
}
/* Supply VFP registers contents, stored in REGS, to REGCACHE.
+2016-09-21 Yao Qi <yao.qi@linaro.org>
+
+ * linux-aarch32-low.c (arm_fill_gregset): Keep bits 20 to
+ 23.
+
2016-09-19 Sergio Durigan Junior <sergiodj@redhat.com>
* server.c (start_inferior): Call target_mourn_inferior instead of
{
int i;
uint32_t *regs = (uint32_t *) buf;
+ uint32_t cpsr = regs[ARM_CPSR_GREGNUM];
for (i = ARM_A1_REGNUM; i <= ARM_PC_REGNUM; i++)
collect_register (regcache, i, ®s[i]);
collect_register (regcache, ARM_PS_REGNUM, ®s[ARM_CPSR_GREGNUM]);
+ /* Keep reserved bits bit 20 to bit 23. */
+ regs[ARM_CPSR_GREGNUM] = ((regs[ARM_CPSR_GREGNUM] & 0xff0fffff)
+ | (cpsr & 0x00f00000));
}
/* Supply GP registers contents, stored in BUF, to REGCACHE. */