radeon/llvm: Support AMDGPUfmin DAG node on SI
authorTom Stellard <thomas.stellard@amd.com>
Thu, 30 Aug 2012 15:10:14 +0000 (11:10 -0400)
committerTom Stellard <thomas.stellard@amd.com>
Fri, 31 Aug 2012 16:54:57 +0000 (12:54 -0400)
src/gallium/drivers/radeon/SIInstructions.td

index 5d4deaa4788ce65768beaad2ba502859c3080361..6653a66672bd97f5cc555b735dfc4459893a3ef2 100644 (file)
@@ -703,7 +703,9 @@ defm V_MUL_F32 : VOP2_32 <0x00000008, "V_MUL_F32", []>;
 //defm V_MUL_HI_I32_I24 : VOP2_32 <0x0000000a, "V_MUL_HI_I32_I24", []>;
 //defm V_MUL_U32_U24 : VOP2_32 <0x0000000b, "V_MUL_U32_U24", []>;
 //defm V_MUL_HI_U32_U24 : VOP2_32 <0x0000000c, "V_MUL_HI_U32_U24", []>;
-defm V_MIN_LEGACY_F32 : VOP2_32 <0x0000000d, "V_MIN_LEGACY_F32", []>;
+defm V_MIN_LEGACY_F32 : VOP2_32 <0x0000000d, "V_MIN_LEGACY_F32",
+  [(set VReg_32:$dst, (AMDGPUfmin AllReg_32:$src0, VReg_32:$src1))]
+>;
 
 defm V_MAX_LEGACY_F32 : VOP2_32 <0x0000000e, "V_MAX_LEGACY_F32",
   [(set VReg_32:$dst, (AMDGPUfmax AllReg_32:$src0, VReg_32:$src1))]