convert mnemonics to be code blocks, so markdown doesn't put all inst variants on...

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index 86d4ba616852e2fd39b45de486d6512a5febc305..61e778ce577bbeaa265915cdf6afde1bfb6dd4bf 100644 (file)
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -292,8 +292,10 @@ File to another.
 
 ## Floating Move To GPR
 
-`fmvtg RT, FRB`
-`fmvtg. RT, FRB`
+```
+    fmvtg RT, FRB
+    fmvtg. RT, FRB
+```
 
 | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form   |
 |-----|------|-------|-------|-------|----|--------|
@@ -316,8 +318,10 @@ Special Registers altered:
 
 ## Floating Move To GPR Single
 
-`fmvtgs RT, FRB`
-`fmvtgs. RT, FRB`
+```
+    fmvtgs RT, FRB
+    fmvtgs. RT, FRB
+```
 
 | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form   |
 |-----|------|-------|-------|-------|----|--------|
@@ -340,8 +344,10 @@ Special Registers altered:
 
 ## Floating Move From GPR
 
-`fmvfg FRT, RB`
-`fmvfg. FRT, RB`
+```
+    fmvfg FRT, RB
+    fmvfg. FRT, RB
+```
 
 | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form   |
 |-----|------|-------|-------|-------|----|--------|
@@ -364,8 +370,10 @@ Special Registers altered:
 
 ## Floating Move From GPR Single
 
-`fmvfgs FRT, RB`
-`fmvfgs. FRT, RB`
+```
+    fmvfgs FRT, RB
+    fmvfgs. FRT, RB
+```
 
 | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form   |
 |-----|------|-------|-------|-------|----|--------|
@@ -399,10 +407,12 @@ as exceptions.
 |-----|------|-------|-------|-------|-------|----|--------|
 | PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
 
-`fcvtfg FRT, RB, IT`
-`fcvtfg. FRT, RB, IT`
-`fcvtfgs FRT, RB, IT`
-`fcvtfgs. FRT, RB, IT`
+```
+    fcvtfg FRT, RB, IT
+    fcvtfg. FRT, RB, IT
+    fcvtfgs FRT, RB, IT
+    fcvtfgs. FRT, RB, IT
+```
 
 ```
     if IT[0] = 0 then  # 32-bit int -> 64-bit float
@@ -470,8 +480,10 @@ Special Registers altered:
 |-----|------|-------|-------|-------|-------|----|--------|
 | PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
 
-`fcvtfgs FRT, RB, IT`
-`fcvtfgs. FRT, RB, IT`
+```
+    fcvtfgs FRT, RB, IT
+    fcvtfgs. FRT, RB, IT
+```
 
 ```
     # rounding may be necessary. based off xscvuxdsp
@@ -661,10 +673,12 @@ Section 7.1 of the ECMAScript / JavaScript
 |-----|------|-------|-------|-------|-------|----|----|---------|
 | PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
 
-`fcvttg RT, FRB, CVM, IT`
-`fcvttg. RT, FRB, CVM, IT`
-`fcvttgo RT, FRB, CVM, IT`
-`fcvttgo. RT, FRB, CVM, IT`
+```
+    fcvttg RT, FRB, CVM, IT
+    fcvttg. RT, FRB, CVM, IT
+    fcvttgo RT, FRB, CVM, IT
+    fcvttgo. RT, FRB, CVM, IT
+```
 
 ```
     # based on xscvdpuxws
@@ -804,10 +818,12 @@ Special Registers altered:
 |-----|------|-------|-------|-------|-------|----|----|---------|
 | PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
 
-`fcvtstg RT, FRB, CVM, IT`
-`fcvtstg. RT, FRB, CVM, IT`
-`fcvtstgo RT, FRB, CVM, IT`
-`fcvtstgo. RT, FRB, CVM, IT`
+```
+    fcvtstg RT, FRB, CVM, IT
+    fcvtstg. RT, FRB, CVM, IT
+    fcvtstgo RT, FRB, CVM, IT
+    fcvtstgo. RT, FRB, CVM, IT
+```
 
 ```
     # based on xscvdpuxws

diff --git a/openpower/sv/rfc/ls006.mdwn b/openpower/sv/rfc/ls006.mdwn
index f839a7d52535db50a8c78bc04251c79fdb8a690f..59723f2a20474ce64729d49fa9c8b9a0dc664d40 100644 (file)
--- a/openpower/sv/rfc/ls006.mdwn
+++ b/openpower/sv/rfc/ls006.mdwn
@@ -131,8 +131,10 @@ Tables that are used by
 
 ## Floating Move To GPR
 
-`fmvtg RT, FRB`
-`fmvtg. RT, FRB`
+```
+    fmvtg RT, FRB
+    fmvtg. RT, FRB
+```
 
 | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form   |
 |-----|------|-------|-------|-------|----|--------|
@@ -159,8 +161,10 @@ Special Registers altered:
 
 ## Floating Move To GPR Single
 
-`fmvtgs RT, FRB`
-`fmvtgs. RT, FRB`
+```
+    fmvtgs RT, FRB
+    fmvtgs. RT, FRB
+```
 
 | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form   |
 |-----|------|-------|-------|-------|----|--------|
@@ -187,8 +191,10 @@ Special Registers altered:
 
 ## Floating Move From GPR
 
-`fmvfg FRT, RB`
-`fmvfg. FRT, RB`
+```
+    fmvfg FRT, RB
+    fmvfg. FRT, RB
+```
 
 | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form   |
 |-----|------|-------|-------|-------|----|--------|
@@ -215,8 +221,10 @@ Special Registers altered:
 
 ## Floating Move From GPR Single
 
-`fmvfgs FRT, RB`
-`fmvfgs. FRT, RB`
+```
+    fmvfgs FRT, RB
+    fmvfgs. FRT, RB
+```
 
 | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form   |
 |-----|------|-------|-------|-------|----|--------|
@@ -247,10 +255,12 @@ Special Registers altered:
 |-----|------|-------|-------|-------|-------|----|--------|
 | PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
 
-`fcvtfg FRT, RB, IT`
-`fcvtfg. FRT, RB, IT`
-`fcvtfgs FRT, RB, IT`
-`fcvtfgs. FRT, RB, IT`
+```
+    fcvtfg FRT, RB, IT
+    fcvtfg. FRT, RB, IT
+    fcvtfgs FRT, RB, IT
+    fcvtfgs. FRT, RB, IT
+```
 
 ```
     if IT[0] = 0 then  # 32-bit int -> 64-bit float
@@ -322,8 +332,10 @@ Special Registers altered:
 |-----|------|-------|-------|-------|-------|----|--------|
 | PO  | FRT  | IT    | 0     | RB    | XO    | Rc | X-Form |
 
-`fcvtfgs FRT, RB, IT`
-`fcvtfgs. FRT, RB, IT`
+```
+    fcvtfgs FRT, RB, IT
+    fcvtfgs. FRT, RB, IT
+```
 
 ```
     # rounding may be necessary. based off xscvuxdsp
@@ -525,10 +537,12 @@ Section 7.1 of the ECMAScript / JavaScript
 |-----|------|-------|-------|-------|-------|----|----|---------|
 | PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
 
-`fcvttg RT, FRB, CVM, IT`
-`fcvttg. RT, FRB, CVM, IT`
-`fcvttgo RT, FRB, CVM, IT`
-`fcvttgo. RT, FRB, CVM, IT`
+```
+    fcvttg RT, FRB, CVM, IT
+    fcvttg. RT, FRB, CVM, IT
+    fcvttgo RT, FRB, CVM, IT
+    fcvttgo. RT, FRB, CVM, IT
+```
 
 ```
     # based on xscvdpuxws
@@ -672,10 +686,12 @@ Special Registers altered:
 |-----|------|-------|-------|-------|-------|----|----|---------|
 | PO  | RT   | IT    | CVM   | FRB   | XO    | OE | Rc | XO-Form |
 
-`fcvtstg RT, FRB, CVM, IT`
-`fcvtstg. RT, FRB, CVM, IT`
-`fcvtstgo RT, FRB, CVM, IT`
-`fcvtstgo. RT, FRB, CVM, IT`
+```
+    fcvtstg RT, FRB, CVM, IT
+    fcvtstg. RT, FRB, CVM, IT
+    fcvtstgo RT, FRB, CVM, IT
+    fcvtstgo. RT, FRB, CVM, IT
+```
 
 ```
     # based on xscvdpuxws