radeonsi: convert SPI state to an atom

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index 28aed79a0bff8ad3912c7603f9c1196a51d76f99..86d7140b327a7fbce905ca37fdb4b79f6655d0a3 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -197,6 +197,7 @@ void si_begin_new_cs(struct si_context *ctx)
        si_mark_atom_dirty(ctx, &ctx->blend_color.atom);
        si_mark_atom_dirty(ctx, &ctx->db_render_state);
        si_mark_atom_dirty(ctx, &ctx->stencil_ref.atom);
+       si_mark_atom_dirty(ctx, &ctx->spi_map);
        si_mark_atom_dirty(ctx, &ctx->b.streamout.enable_atom);
        si_all_descriptors_begin_new_cs(ctx);
 

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index e5d5d10851fce81a3b3eb6cc7fc73454811d6d50..ba5dd1dbf77d0984048e41b31ffd040dc27a6b70 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -204,6 +204,7 @@ struct si_context {
        struct r600_atom                clip_regs;
        struct si_sample_mask           sample_mask;
        struct r600_atom                cb_target_mask;
+       struct r600_atom                spi_map;
        struct r600_atom                msaa_sample_locs;
        struct r600_atom                msaa_config;
        int                             ps_iter_samples;

diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index a396f07e926d0d3b69617d021bf0d55853e71466..b15f971f369da7e1da4cb8eafa73d113405aeadc 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -99,7 +99,6 @@ union si_state {
                struct si_pm4_state             *vgt_shader_config;
                struct si_pm4_state             *vs;
                struct si_pm4_state             *ps;
-               struct si_pm4_state             *spi;
        } named;
        struct si_pm4_state     *array[0];
 };
@@ -123,6 +122,7 @@ union si_state_atoms {
                struct r600_atom *scissors;
                struct r600_atom *viewports;
                struct r600_atom *stencil_ref;
+               struct r600_atom *spi_map;
        } s;
        struct r600_atom *array[0];
 };

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 702af8c803e162b1c89893e53292ae6d11010161..cef32822e54514a89cf291e12f002e51ad0b8cdc 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -28,6 +28,7 @@
 #include "si_pipe.h"
 #include "si_shader.h"
 #include "sid.h"
+#include "radeon/r600_cs.h"
 
 #include "tgsi/tgsi_parse.h"
 #include "tgsi/tgsi_ureg.h"
@@ -980,14 +981,19 @@ static void si_delete_tes_shader(struct pipe_context *ctx, void *state)
        si_delete_shader_selector(ctx, sel);
 }
 
-static void si_update_spi_map(struct si_context *sctx)
+static void si_emit_spi_map(struct si_context *sctx, struct r600_atom *atom)
 {
+       struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
        struct si_shader *ps = sctx->ps_shader->current;
        struct si_shader *vs = si_get_vs_state(sctx);
        struct tgsi_shader_info *psinfo = &ps->selector->info;
        struct tgsi_shader_info *vsinfo = &vs->selector->info;
-       struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
-       unsigned i, j, tmp;
+       unsigned i, j, tmp, num_written = 0;
+
+       if (!ps->nparam)
+               return;
+
+       radeon_set_context_reg_seq(cs, R_028644_SPI_PS_INPUT_CNTL_0, ps->nparam);
 
        for (i = 0; i < psinfo->num_inputs; i++) {
                unsigned name = psinfo->input_semantic_name[i];
@@ -1031,9 +1037,9 @@ bcolor:
                        tmp = S_028644_OFFSET(0x20);
                }
 
-               si_pm4_set_reg(pm4,
-                              R_028644_SPI_PS_INPUT_CNTL_0 + param_offset * 4,
-                              tmp);
+               assert(param_offset == num_written);
+               radeon_emit(cs, tmp);
+               num_written++;
 
                if (name == TGSI_SEMANTIC_COLOR &&
                    ps->key.ps.color_two_side) {
@@ -1042,8 +1048,7 @@ bcolor:
                        goto bcolor;
                }
        }
-
-       si_pm4_set_state(sctx, spi, pm4);
+       assert(ps->nparam == num_written);
 }
 
 /* Initialize state related to ESGS / GSVS ring buffers */
@@ -1452,7 +1457,7 @@ void si_update_shaders(struct si_context *sctx)
            sctx->flatshade != rs->flatshade) {
                sctx->sprite_coord_enable = rs->sprite_coord_enable;
                sctx->flatshade = rs->flatshade;
-               si_update_spi_map(sctx);
+               si_mark_atom_dirty(sctx, &sctx->spi_map);
        }
 
        if (si_pm4_state_changed(sctx, ps) || si_pm4_state_changed(sctx, vs) ||
@@ -1476,6 +1481,8 @@ void si_update_shaders(struct si_context *sctx)
 
 void si_init_shader_functions(struct si_context *sctx)
 {
+       si_init_atom(sctx, &sctx->spi_map, &sctx->atoms.s.spi_map, si_emit_spi_map, 2+31);
+
        sctx->b.b.create_vs_state = si_create_vs_state;
        sctx->b.b.create_tcs_state = si_create_tcs_state;
        sctx->b.b.create_tes_state = si_create_tes_state;