generate linker memory map, move all generated files into the same folder

diff --git a/.gitignore b/.gitignore
index cea03fad14d071f798a8fd18d7d3ac1332ae98b4..45c29b2cdc596c55409cc5389218b307561122b5 100644 (file)
--- a/.gitignore
+++ b/.gitignore
@@ -9,8 +9,8 @@ build/*
 tools/flterm
 tools/mkmscimg
 tools/byteswap
-software/include/hw/csr.h
-software/include/hw/sdram_phy.h
+software/include/generated/*.h
+software/include/generated/*.ld
 software/videomixer/dvisampler0.c
 software/videomixer/dvisampler0.h
 software/videomixer/dvisampler1.c

diff --git a/make.py b/make.py
index 1103173a6e7e935864fa8c8a3ee92c523287844b..fea284f3df503395d51909ee82ecc8082efa80c0 100755 (executable)
--- a/make.py
+++ b/make.py
@@ -65,10 +65,12 @@ def main():
  */
 
 """.format(args.platform, args.target, top_class.__name__)
+               linker_header = cpuif.get_linker_regions(soc.cpu_memory_regions)
+               write_to_file("software/include/generated/regions.ld", boilerplate + linker_header)
                csr_header = cpuif.get_csr_header(soc.csr_base, soc.csrbankarray, soc.interrupt_map)
-               write_to_file("software/include/hw/csr.h", boilerplate + csr_header)
+               write_to_file("software/include/generated/csr.h", boilerplate + csr_header)
                sdram_phy_header = initsequence.get_sdram_phy_header(soc.ddrphy)
-               write_to_file("software/include/hw/sdram_phy.h", boilerplate + sdram_phy_header)
+               write_to_file("software/include/generated/sdram_phy.h", boilerplate + sdram_phy_header)
        if args.csr_csv:
                csr_csv = cpuif.get_csr_csv(soc.csr_base, soc.csrbankarray)
                write_to_file(args.csr_csv, csr_csv)

diff --git a/misoclib/gensoc/__init__.py b/misoclib/gensoc/__init__.py
index 71fe7c6d73fa9708ebe358adf07209e4011a6d78..c65ea8d0bd0cd0b4d5b907b5f6f03b71a6f266c3 100644 (file)
--- a/misoclib/gensoc/__init__.py
+++ b/misoclib/gensoc/__init__.py
@@ -29,13 +29,14 @@ class GenSoC(Module):
                "m1":           0x4D31
        })
 
-       def __init__(self, platform, clk_freq, sram_size, l2_size=0):
+       def __init__(self, platform, clk_freq, cpu_reset_address, sram_size, l2_size=0):
                self.clk_freq = clk_freq
                self.sram_size = sram_size
                self.l2_size = l2_size
+               self.cpu_memory_regions = []
 
                # Wishbone
-               self.submodules.cpu = lm32.LM32()
+               self.submodules.cpu = lm32.LM32() # TODO: cpu_reset_address
                self.submodules.sram = wishbone.SRAM(sram_size)
                self.submodules.wishbone2csr = wishbone2csr.WB2CSR()
 
@@ -47,6 +48,8 @@ class GenSoC(Module):
                        (lambda a: a[26:29] == 1, self.sram.bus),
                        (lambda a: a[27:29] == 3, self.wishbone2csr.wishbone)
                ]
+               self.add_cpu_memory_region("rom", cpu_reset_address, 0x8000) # 32KB for BIOS
+               self.add_cpu_memory_region("sram", 0x10000000, sram_size)
 
                # CSR
                self.submodules.uart = uart.UART(platform.request("serial"), clk_freq, baud=115200)
@@ -74,6 +77,9 @@ class GenSoC(Module):
                        raise FinalizeError
                self._wb_slaves.append((address_decoder, interface))
 
+       def add_cpu_memory_region(self, name, origin, length):
+               self.cpu_memory_regions.append((name, origin, length))
+
        def do_finalize(self):
                # Wishbone
                self.submodules.wishbonecon = wishbone.InterconnectShared(self._wb_masters,
@@ -104,8 +110,8 @@ class SDRAMSoC(GenSoC):
        }
        csr_map.update(GenSoC.csr_map)
 
-       def __init__(self, platform, clk_freq, sram_size, l2_size, with_memtest):
-               GenSoC.__init__(self, platform, clk_freq, sram_size, l2_size)
+       def __init__(self, platform, clk_freq, cpu_reset_address, sram_size, l2_size, with_memtest):
+               GenSoC.__init__(self, platform, clk_freq, cpu_reset_address, sram_size, l2_size)
                self.with_memtest = with_memtest
                self._sdram_modules_created = False
 
@@ -132,6 +138,8 @@ class SDRAMSoC(GenSoC):
                # Wishbone bridge: map SDRAM at 0x40000000 (shadow @0xc0000000)
                self.submodules.wishbone2lasmi = wishbone2lasmi.WB2LASMI(self.l2_size//4, self.lasmixbar.get_master())
                self.add_wb_slave(lambda a: a[27:29] == 2, self.wishbone2lasmi.wishbone)
+               self.add_cpu_memory_region("sdram", 0x40000000,
+                       2**self.lasmicon.lasmic.aw*self.lasmicon.lasmic.dw*self.lasmicon.lasmic.nbanks//8)
 
        def do_finalize(self):
                if not self._sdram_modules_created:

diff --git a/misoclib/gensoc/cpuif.py b/misoclib/gensoc/cpuif.py
index 0dcdfc16dd7e52b48d157ead842ae9ef653aedbf..9c40b6b9a5826928dcd138f7f28ae514968e9b54 100644 (file)
--- a/misoclib/gensoc/cpuif.py
+++ b/misoclib/gensoc/cpuif.py
@@ -1,5 +1,12 @@
 from migen.bank.description import CSRStatus
 
+def get_linker_regions(regions):
+       r = "MEMORY {\n"
+       for name, origin, length in regions:
+               r += "\t{} : ORIGIN = 0x{:08x}, LENGTH = 0x{:08x}\n".format(name, origin, length)
+       r += "}\n"
+       return r
+
 def _get_rw_functions(reg_name, reg_base, size, read_only):
        r = ""
 
@@ -39,7 +46,7 @@ def _get_rw_functions(reg_name, reg_base, size, read_only):
        return r
 
 def get_csr_header(csr_base, bank_array, interrupt_map):
-       r = "#ifndef __HW_CSR_H\n#define __HW_CSR_H\n#include <hw/common.h>\n"
+       r = "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n#include <hw/common.h>\n"
        for name, csrs, mapaddr, rmap in bank_array.banks:
                r += "\n/* "+name+" */\n"
                reg_base = csr_base + 0x800*mapaddr

diff --git a/misoclib/s6ddrphy/initsequence.py b/misoclib/s6ddrphy/initsequence.py
index 3c4c65bf352cf6c0dd16ff47270e9c91f21faeb9..cf76d4e97027f85fb1cb39a7b985edfdd648353f 100644 (file)
--- a/misoclib/s6ddrphy/initsequence.py
+++ b/misoclib/s6ddrphy/initsequence.py
@@ -4,8 +4,8 @@ def get_sdram_phy_header(sdram_phy):
        if sdram_phy.phy_settings.memtype not in ["SDR", "DDR", "LPDDR", "DDR2"]:
                raise NotImplementedError("The SDRAM PHY header generator only supports SDR, DDR, LPDDR and DDR2")
 
-       r = "#ifndef __HW_SDRAM_PHY_H\n#define __HW_SDRAM_PHY_H\n"
-       r += "#include <hw/common.h>\n#include <hw/csr.h>\n#include <hw/flags.h>\n\n"
+       r = "#ifndef __GENERATED_SDRAM_PHY_H\n#define __GENERATED_SDRAM_PHY_H\n"
+       r += "#include <hw/common.h>\n#include <generated/csr.h>\n#include <hw/flags.h>\n\n"
 
        r += "static void cdelay(int i);\n"
 

diff --git a/software/bios/boot.c b/software/bios/boot.c
index 9d9b33632d3788a0593b4c954334bcb1a157c027..93ae18cbeed164cecfbf1545cac926a727d5609d 100644 (file)
--- a/software/bios/boot.c
+++ b/software/bios/boot.c
@@ -8,7 +8,7 @@
 #include <irq.h>
 
 #include <hw/mem.h>
-#include <hw/csr.h>
+#include <generated/csr.h>
 
 #include <net/microudp.h>
 #include <net/tftp.h>

diff --git a/software/bios/isr.c b/software/bios/isr.c
index 36c4c7e07268a7caeb3a588a47b4a3af77ee61d3..c49d31d8dbd8b6bcb88774d504f619eaee04fb0c 100644 (file)
--- a/software/bios/isr.c
+++ b/software/bios/isr.c
@@ -1,4 +1,4 @@
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <irq.h>
 #include <uart.h>
 

diff --git a/software/bios/linker.ld b/software/bios/linker.ld
index b21c1e36345013c8e79a9cdb7d58fade7f0d2b59..302f7e02384abb07ca6220b951bd8e473c9ba7ab 100644 (file)
--- a/software/bios/linker.ld
+++ b/software/bios/linker.ld
@@ -3,10 +3,7 @@ ENTRY(_start)
 
 __DYNAMIC = 0;
 
-MEMORY {
-       rom  : ORIGIN = 0x00180000, LENGTH = 0x20000 /* 128K */
-       sram : ORIGIN = 0x10000000, LENGTH = 0x01000 /* 4K */
-}
+INCLUDE generated/regions.ld
 
 SECTIONS
 {

diff --git a/software/bios/main.c b/software/bios/main.c
index 091b2d9195c5fbd4b91213c76d874377fe5fb070..9c4d878d34699bcfe52408a55f4869afbbf7dd95 100644 (file)
--- a/software/bios/main.c
+++ b/software/bios/main.c
@@ -8,7 +8,7 @@
 #include <irq.h>
 #include <crc.h>
 
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <hw/mem.h>
 #include <net/microudp.h>
 

diff --git a/software/bios/sdram.c b/software/bios/sdram.c
index 8fef0410a7d70c103e980e2cc2f12541ff41b0aa..3a4fed44b02e81416818e5406a37d06d2706e9f8 100644 (file)
--- a/software/bios/sdram.c
+++ b/software/bios/sdram.c
@@ -1,8 +1,8 @@
 #include <stdio.h>
 #include <stdlib.h>
 
-#include <hw/csr.h>
-#include <hw/sdram_phy.h>
+#include <generated/csr.h>
+#include <generated/sdram_phy.h>
 #include <hw/flags.h>
 #include <hw/mem.h>
 

diff --git a/software/common.mak b/software/common.mak
index 7320685e9068718a6a3cddc7856f80c37b322618..c69f2a7f9c5d10c35734b3b43a917f533b2cc70c 100644 (file)
--- a/software/common.mak
+++ b/software/common.mak
@@ -45,7 +45,7 @@ COMMONFLAGS = -Os -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -ms
        -Wall -fno-builtin -nostdinc -DGIT_ID=$(GIT_ID) $(INCLUDES)
 CFLAGS = $(COMMONFLAGS) -Wstrict-prototypes -Wold-style-definition -Wmissing-prototypes
 CXXFLAGS = $(COMMONFLAGS) -fno-exceptions -ffreestanding
-LDFLAGS = -nostdlib -nodefaultlibs
+LDFLAGS = -nostdlib -nodefaultlibs -L$(MSCDIR)/software/include
 
 # compile and generate dependencies, based on
 # http://scottmcpeak.com/autodepend/autodepend.html

diff --git a/software/include/generated/.keep_me b/software/include/generated/.keep_me
new file mode 100644 (file)
index 0000000..e69de29

diff --git a/software/libbase/id.c b/software/libbase/id.c
index a0f92f5342379372668e56b3d1cc41c1c6b7cf64..254aa55cc12a18e53836eb3765b06c11d14aba85 100644 (file)
--- a/software/libbase/id.c
+++ b/software/libbase/id.c
@@ -1,4 +1,4 @@
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>

diff --git a/software/libbase/linker-sdram.ld b/software/libbase/linker-sdram.ld
index fd17edbfdedeb3f37a03ea1ac167021ade0aa335..16cb35e2af4519882a3619ec52c7ee32923a2cc2 100644 (file)
--- a/software/libbase/linker-sdram.ld
+++ b/software/libbase/linker-sdram.ld
@@ -3,9 +3,7 @@ ENTRY(_start)
 
 __DYNAMIC = 0;
 
-MEMORY {
-       sdram  : ORIGIN = 0x40000000, LENGTH = 0x08000000 /* 128M */
-}
+INCLUDE generated/regions.ld
 
 SECTIONS
 {

diff --git a/software/libbase/system.c b/software/libbase/system.c
index fcb585d973aafe1c514a8703deaa088eed245871..7159e379942378549275241740ecbba2b257e77c 100644 (file)
--- a/software/libbase/system.c
+++ b/software/libbase/system.c
@@ -3,7 +3,7 @@
 
 #include <system.h>
 #include <hw/mem.h>
-#include <hw/csr.h>
+#include <generated/csr.h>
 
 void flush_cpu_icache(void)
 {

diff --git a/software/libbase/time.c b/software/libbase/time.c
index c809dfd54a72e9b223930deee696e8bea2346bb9..4bf95479a9ea7da163d09f9b1683f66961513b8c 100644 (file)
--- a/software/libbase/time.c
+++ b/software/libbase/time.c
@@ -1,4 +1,4 @@
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <time.h>
 
 void time_init(void)

diff --git a/software/libbase/uart.c b/software/libbase/uart.c
index 5b88569bf8c106c9394c730c195e9c8cd98d7086..13dfe3b1f1ec264f033c72d8c518ce52a8bce4d0 100644 (file)
--- a/software/libbase/uart.c
+++ b/software/libbase/uart.c
@@ -1,6 +1,6 @@
 #include <uart.h>
 #include <irq.h>
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <hw/flags.h>
 
 /*

diff --git a/software/libnet/microudp.c b/software/libnet/microudp.c
index d499d63924f9a6f2505e85531e0a4af64dda5255..09e4c40e5a490aca2ffab589ba2149ee1d783132 100644 (file)
--- a/software/libnet/microudp.c
+++ b/software/libnet/microudp.c
@@ -1,7 +1,7 @@
 #include <stdio.h>
 #include <system.h>
 #include <crc.h>
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <hw/flags.h>
 #include <hw/mem.h>
 

diff --git a/software/memtest/isr.c b/software/memtest/isr.c
index 36c4c7e07268a7caeb3a588a47b4a3af77ee61d3..c49d31d8dbd8b6bcb88774d504f619eaee04fb0c 100644 (file)
--- a/software/memtest/isr.c
+++ b/software/memtest/isr.c
@@ -1,4 +1,4 @@
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <irq.h>
 #include <uart.h>
 

diff --git a/software/memtest/main.c b/software/memtest/main.c
index 603e50a25bd28190fcc523437d3f96be91e8dddd..67143b8432c75474f3bac9bed84b2501d7a76f06 100644 (file)
--- a/software/memtest/main.c
+++ b/software/memtest/main.c
@@ -4,7 +4,7 @@
 #include <irq.h>
 #include <uart.h>
 #include <time.h>
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <hw/flags.h>
 #include <console.h>
 #include <system.h>

diff --git a/software/videomixer/ci.c b/software/videomixer/ci.c
index f6f1110a6261293d95f0f536a1cebcb96b1e6c3c..6b0f430446efef22e4e7dd00623f67eebb32c02d 100644 (file)
--- a/software/videomixer/ci.c
+++ b/software/videomixer/ci.c
@@ -1,7 +1,7 @@
 #include <stdio.h>
 
 #include <console.h>
-#include <hw/csr.h>
+#include <generated/csr.h>
 
 #include "dvisampler0.h"
 #include "dvisampler1.h"

diff --git a/software/videomixer/dvisamplerX.c b/software/videomixer/dvisamplerX.c
index 088519c70ddfc3691fbb56ff1d2fe558adba51bb..6ba69232cc2f7920095c991f194458ce37d1af8d 100644 (file)
--- a/software/videomixer/dvisamplerX.c
+++ b/software/videomixer/dvisamplerX.c
@@ -6,7 +6,7 @@
 #include <uart.h>
 #include <time.h>
 #include <system.h>
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <hw/flags.h>
 
 #include "dvisamplerX.h"

diff --git a/software/videomixer/isr.c b/software/videomixer/isr.c
index aa1139f805ceb3300f7db55e11b965064683e265..db878a3912e52018d72a54cd12973ed85e4b57fa 100644 (file)
--- a/software/videomixer/isr.c
+++ b/software/videomixer/isr.c
@@ -1,4 +1,4 @@
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <irq.h>
 #include <uart.h>
 

diff --git a/software/videomixer/main.c b/software/videomixer/main.c
index 998f7f82d5078a988fcc95f4255f5a2922d6f8c8..544d1837e1e5b3a6cc7b0863d20aa4d3ff102a59 100644 (file)
--- a/software/videomixer/main.c
+++ b/software/videomixer/main.c
@@ -4,7 +4,7 @@
 #include <irq.h>
 #include <uart.h>
 #include <time.h>
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <hw/flags.h>
 #include <console.h>
 

diff --git a/software/videomixer/pll.c b/software/videomixer/pll.c
index 1a8689e4ae8f9d4ef63bb281d50d370f1cfaf1b0..843a0276247e7651443177765ece64ec39c738f3 100644 (file)
--- a/software/videomixer/pll.c
+++ b/software/videomixer/pll.c
@@ -1,5 +1,5 @@
 #include <stdio.h>
-#include <hw/csr.h>
+#include <generated/csr.h>
 
 #include "pll.h"
 

diff --git a/software/videomixer/processor.c b/software/videomixer/processor.c
index d5580d1ccb07a1a63ad1b9be0818744b9f573421..07e73a383ec1db7718954f706c6e1988a52a32a2 100644 (file)
--- a/software/videomixer/processor.c
+++ b/software/videomixer/processor.c
@@ -1,7 +1,7 @@
 #include <stdio.h>
 #include <stdlib.h>
 
-#include <hw/csr.h>
+#include <generated/csr.h>
 #include <hw/flags.h>
 
 #include "dvisampler0.h"

diff --git a/targets/mlabs_video.py b/targets/mlabs_video.py
index 580bcdba5ffa62e4714a5a45dac4f4b77a62a7a0..43491c7e650f6f222a303ff05d173285e6c9626f 100644 (file)
--- a/targets/mlabs_video.py
+++ b/targets/mlabs_video.py
@@ -45,6 +45,7 @@ class MiniSoC(SDRAMSoC):
        def __init__(self, platform, with_memtest=False):
                SDRAMSoC.__init__(self, platform,
                        clk_freq=(83 + Fraction(1, 3))*1000000,
+                       cpu_reset_address=0x00180000,
                        sram_size=4096,
                        l2_size=8192,
                        with_memtest=with_memtest)