Simplify use of external targets/platforms/cores + add default platform in targets
authorSebastien Bourdeauducq <sb@m-labs.hk>
Sun, 16 Feb 2014 13:51:52 +0000 (14:51 +0100)
committerSebastien Bourdeauducq <sb@m-labs.hk>
Sun, 16 Feb 2014 13:51:52 +0000 (14:51 +0100)
README
make.py
software/bios/main.c
software/common.mak
software/videomixer/main.c
targets/mlabs_video.py
targets/simple.py

diff --git a/README b/README
index 126c72d47b62f65ed5da4fb5c384793fcddf7939..fb3d939e1ffc5389f879a0d989397e6c9c1a76b1 100644 (file)
--- a/README
+++ b/README
@@ -1,10 +1,10 @@
 [> MiSoC system-on-chip
 ------------------------------
 
-A high performance system-on-chip design based on Migen.
+A high performance and small footprint system-on-chip design based on Migen.
 
 MiSoC supports the Mixxeo and the Milkymist One.
-Obtain your development system at http://milkymist.org
+Obtain your development system at http://m-labs.hk
 
 [> Instructions (software)
 --------------------------
@@ -71,4 +71,4 @@ do them if possible:
    the mailing list or IRC (#m-labs on Freenode) beforehand.
 
 See LICENSE file for full copyright and license info. You can contact us on the
-public mailing list devel [AT] lists.milkymist.org.
+public mailing list devel [AT] lists.m-labs.hk.
diff --git a/make.py b/make.py
index 1b0c8c5044d0cca914b3f2f28c39de6af1c4aac8..419ed6b6e1a5dfe15057dcef3b8a399916212acd 100755 (executable)
--- a/make.py
+++ b/make.py
@@ -1,6 +1,6 @@
 #!/usr/bin/env python3
 
-import sys, argparse, importlib, subprocess, struct
+import sys, os, argparse, importlib, subprocess, struct
 
 from mibuild.tools import write_to_file
 from migen.util.misc import autotype
@@ -33,12 +33,11 @@ all             build-bitstream, build-bios, flash-bitstream, flash-bios.
 Load/flash actions use the existing outputs, and do not trigger new builds.
 """)
 
-       parser.add_argument("-p", "--platform", default="mixxeo", help="platform to build for")
        parser.add_argument("-t", "--target", default="mlabs_video", help="SoC type to build")
        parser.add_argument("-s", "--sub-target", default="", help="variant of the SoC type to build")
+       parser.add_argument("-p", "--platform", default=None, help="platform to build for")
        parser.add_argument("-Ot", "--target-option", default=[], nargs=2, action="append", help="set target-specific option")
-       parser.add_argument("-Xp", "--external-platform", default="", help="use external platform file in the specified path")
-       parser.add_argument("-Xt", "--external-target", default="", help="use external target file in the specified path")
+       parser.add_argument("-X", "--external", default="", help="use external directory for targets, platforms and imports")
 
        parser.add_argument("-d", "--decorate", default=[], action="append", help="apply simplification decorator to top-level")
        parser.add_argument("-Ob", "--build-option", default=[], nargs=2, action="append", help="set build option")
@@ -56,7 +55,8 @@ def _misoc_import(default, external, name):
                        pass
                loader = importlib.find_loader(name, [external])
                if loader is None:
-                       raise ImportError("Module not found: "+name)
+                       # try internal import
+                       return importlib.import_module(default + "." + name)
                return loader.load_module()
        else:
                return importlib.import_module(default + "." + name)
@@ -64,15 +64,28 @@ def _misoc_import(default, external, name):
 if __name__ == "__main__":
        args = _get_args()
 
+       external_target = ""
+       external_platform = ""
+       if args.external:
+               external_target = os.path.join(args.external, "targets")
+               external_platform = os.path.join(args.external, "platforms")
+               sys.path.insert(1, os.path.abspath(args.external))
+
        # create top-level SoC object
-       platform_module = _misoc_import("mibuild.platforms", args.external_platform, args.platform)
-       target_module = _misoc_import("targets", args.external_target, args.target)
-       platform = platform_module.Platform()
+       target_module = _misoc_import("targets", external_target, args.target)
        if args.sub_target:
                top_class = getattr(target_module, args.sub_target)
        else:
-               top_class = target_module.get_default_subtarget(platform)
-       build_name = top_class.__name__.lower() + "-" + args.platform
+               top_class = target_module.default_subtarget
+
+       if args.platform is None:
+               platform_name = top_class.default_platform
+       else:
+               platform_name = args.platform
+       platform_module = _misoc_import("mibuild.platforms", external_platform, platform_name)
+       platform = platform_module.Platform()
+
+       build_name = top_class.__name__.lower() + "-" + platform_name
        top_kwargs = dict((k, autotype(v)) for k, v in args.target_option)
        soc = top_class(platform, **top_kwargs)
        soc.finalize()
@@ -90,6 +103,20 @@ if __name__ == "__main__":
                                print("  "+a)
                        sys.exit(1)
 
+       print("""\
+                __  ___  _   ____     _____
+               /  |/  / (_) / __/__  / ___/
+              / /|_/ / / / _\ \/ _ \/ /__
+             /_/  /_/ /_/ /___/\___/\___/
+
+a high performance and small footprint SoC based on Migen
+
+====== Building for: ======
+Platform:  {}
+Target:    {}
+Subtarget: {}
+===========================""".format(platform_name, args.target, top_class.__name__))
+
        # dependencies
        if actions["all"]:
                actions["build-bitstream"] = True
@@ -103,12 +130,12 @@ if __name__ == "__main__":
 
        if actions["build-headers"]:
                boilerplate = """/*
- * Platform: {}
- * Target: {}
+ * Platform:  {}
+ * Target:    {}
  * Subtarget: {}
  */
 
-""".format(args.platform, args.target, top_class.__name__)
+""".format(platform_name, args.target, top_class.__name__)
                linker_header = cpuif.get_linker_regions(soc.cpu_memory_regions)
                write_to_file("software/include/generated/regions.ld", boilerplate + linker_header)
                csr_header = cpuif.get_csr_header(soc.csr_base, soc.csrbankarray, soc.interrupt_map)
index 3044c280bd7b6fadf724e64eac34d57f3e8bd7a3..f26ac2109159ca5843c3427b09f049aefde9e2bd 100644 (file)
@@ -355,7 +355,7 @@ static void do_command(char *c)
        else if(strcmp(token, "netboot") == 0) netboot();
 #endif
        
-       else if(strcmp(token, "revision") == 0) printf("%08x\n", GIT_ID);
+       else if(strcmp(token, "revision") == 0) printf("%08x\n", MSC_GIT_ID);
 
        else if(strcmp(token, "help") == 0) help();
 
@@ -498,7 +498,7 @@ int main(int i, char **c)
        uart_init();
        puts("\nMiSoC BIOS   http://m-labs.hk\n"
        "(c) Copyright 2007-2014 Sebastien Bourdeauducq");
-       printf("Revision %08x built "__DATE__" "__TIME__"\n\n", GIT_ID);
+       printf("Revision %08x built "__DATE__" "__TIME__"\n\n", MSC_GIT_ID);
        crcbios();
        id_print();
 #ifdef MINIMAC_BASE
index c69f2a7f9c5d10c35734b3b43a917f533b2cc70c..761982ecf3f3d1b5cce80280bb90ef224810e8d5 100644 (file)
@@ -18,7 +18,7 @@ LD_quiet = @echo " LD " $@ && $(TARGET_PREFIX)ld
 OBJCOPY_quiet = @echo " OBJCOPY " $@ && $(TARGET_PREFIX)objcopy
 RANLIB_quiet = @echo " RANLIB  " $@ && $(TARGET_PREFIX)ranlib
 
-GIT_ID := $(shell python3 -c "from misoclib.identifier.git import get_id; print(hex(get_id()), end='')")
+MSC_GIT_ID := $(shell cd $(MSCDIR) && python3 -c "from misoclib.identifier.git import get_id; print(hex(get_id()), end='')")
 
 ifeq ($(V),1)
        CC = $(CC_normal)
@@ -42,7 +42,7 @@ endif
 #
 INCLUDES = -I$(MSCDIR)/software/include/base -I$(MSCDIR)/software/include -I$(MSCDIR)/common
 COMMONFLAGS = -Os -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled \
-       -Wall -fno-builtin -nostdinc -DGIT_ID=$(GIT_ID) $(INCLUDES)
+       -Wall -fno-builtin -nostdinc -DMSC_GIT_ID=$(MSC_GIT_ID) $(INCLUDES)
 CFLAGS = $(COMMONFLAGS) -Wstrict-prototypes -Wold-style-definition -Wmissing-prototypes
 CXXFLAGS = $(COMMONFLAGS) -fno-exceptions -ffreestanding
 LDFLAGS = -nostdlib -nodefaultlibs -L$(MSCDIR)/software/include
index f8537e63208aa388a31593d56889871da673fd32..375a1a000c06e088a28b582163d8fbf00b42c9e6 100644 (file)
@@ -91,7 +91,7 @@ int main(void)
        irq_setie(1);
        uart_init();
        
-       printf("Mixxeo software rev. %08x built "__DATE__" "__TIME__"\n\n", GIT_ID);
+       printf("Mixxeo software rev. %08x built "__DATE__" "__TIME__"\n\n", MSC_GIT_ID);
        
        config_init();
        time_init();
index e7e38774297f3d140e69fe4b10731717bc3e8d27..e0a00f86f182baefb1661ea59d514d6bc83168b9 100644 (file)
@@ -25,6 +25,8 @@ class _MXClockPads:
                self.eth_tx_clk = eth_clocks.tx
 
 class MiniSoC(SDRAMSoC):
+       default_platform = "mixxeo" # also supports m1
+
        csr_map = {
                "minimac":                              10,
                "fb":                                   11,
@@ -140,8 +142,4 @@ class VideomixerSoC(MiniSoC):
                self.submodules.dvisampler0 = dvisampler.DVISampler(platform.request("dvi_in", 2), self.lasmixbar.get_master())
                self.submodules.dvisampler1 = dvisampler.DVISampler(platform.request("dvi_in", 3), self.lasmixbar.get_master())
 
-def get_default_subtarget(platform):
-       if platform.name == "mixxeo":
-               return VideomixerSoC
-       else:
-               return FramebufferSoC
+default_subtarget = VideomixerSoC
index 592610b6aed49dad2104e9a00262754214d3a7f8..ed8fbdee09dcaeff8cd537c6648630ea7d46fa42 100644 (file)
@@ -4,6 +4,8 @@ from misoclib import gpio, spiflash
 from misoclib.gensoc import GenSoC
 
 class SimpleSoC(GenSoC):
+       default_platform = "papilio_pro"
+
        def __init__(self, platform):
                GenSoC.__init__(self, platform,
                        clk_freq=32*1000000,
@@ -14,11 +16,11 @@ class SimpleSoC(GenSoC):
                self.comb += self.cd_sys.clk.eq(platform.request("clk32"))
                self.specials += Instance("FD", p_INIT=1, i_D=0, o_Q=self.cd_sys.rst, i_C=ClockSignal())
 
-               self.submodules.leds = gpio.GPIOOut(platform.request("user_led"))
-
+               # BIOS is in SPI flash
                self.submodules.spiflash = spiflash.SpiFlash(platform.request("spiflash2x"),
                        cmd=0xefef, cmd_width=16, addr_width=24, dummy=4)
                self.register_rom(self.spiflash.bus)
 
-def get_default_subtarget(platform):
-       return SimpleSoC
+               self.submodules.leds = gpio.GPIOOut(platform.request("user_led"))
+
+default_subtarget = SimpleSoC