lima/ppir: simplify select op lowering and scheduling
authorErico Nunes <nunes.erico@gmail.com>
Sun, 21 Jul 2019 13:07:50 +0000 (15:07 +0200)
committerErico Nunes <nunes.erico@gmail.com>
Sun, 4 Aug 2019 11:38:18 +0000 (13:38 +0200)
The select operation relies on the select condition coming from the
result of the the alu scalar mult slot, in the same instruction.
The current implementation creates a mov node to be the predecessor of
select, and then relies on an exception during scheduling to ensure that
both ops are inserted in the same instruction.

Now that the ppir scheduler supports pipeline register dependencies,
this can be simplified by making the mov explicitly output to the fmul
pipeline register, and the scheduler can place it without an exception.

Since the select condition can only be placed in the scalar mult slot,
differently than a regular mov, define a separate op for it.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
src/gallium/drivers/lima/ir/pp/codegen.c
src/gallium/drivers/lima/ir/pp/lower.c
src/gallium/drivers/lima/ir/pp/node.c
src/gallium/drivers/lima/ir/pp/node_to_instr.c
src/gallium/drivers/lima/ir/pp/ppir.h

index 96f1ffce000033484060679c4b8c82d81166a5ce..615438cfccef74369b8a614b9e90974de9a66fc1 100644 (file)
@@ -243,6 +243,9 @@ static void ppir_codegen_encode_scl_mul(ppir_node *node, void *code)
    case ppir_op_mov:
       f->op = ppir_codegen_float_mul_op_mov;
       break;
+   case ppir_op_sel_cond:
+      f->op = ppir_codegen_float_mul_op_mov;
+      break;
    case ppir_op_max:
       f->op = ppir_codegen_float_mul_op_max;
       break;
index c3be6acfe8f08ff1fcdb4cf9ebe3652bdc25a9a6..97837f4c19814f73a8a40aa62bfe90cd9f03b8ab 100644 (file)
@@ -201,7 +201,7 @@ static bool ppir_lower_select(ppir_block *block, ppir_node *node)
 {
    ppir_alu_node *alu = ppir_node_to_alu(node);
 
-   ppir_node *move = ppir_node_create(block, ppir_op_mov, -1, 0);
+   ppir_node *move = ppir_node_create(block, ppir_op_sel_cond, -1, 0);
    if (!move)
       return false;
    list_addtail(&move->list, &node->list);
@@ -214,10 +214,8 @@ static bool ppir_lower_select(ppir_block *block, ppir_node *node)
    move_alu->num_src = 1;
 
    ppir_dest *move_dest = &move_alu->dest;
-   move_dest->type = ppir_target_ssa;
-   move_dest->ssa.num_components = 1;
-   move_dest->ssa.live_in = INT_MAX;
-   move_dest->ssa.live_out = 0;
+   move_dest->type = ppir_target_pipeline;
+   move_dest->pipeline = ppir_pipeline_reg_fmul;
    move_dest->write_mask = 1;
 
    ppir_node_foreach_pred(node, dep) {
index c62e4cc2e5700787a2cc906ec2564c1a5155b45c..602d4625138beedf8e6d713fc7465520490b7a21 100644 (file)
@@ -211,6 +211,14 @@ const ppir_op_info ppir_op_infos[] = {
          PPIR_INSTR_SLOT_END
       },
    },
+   [ppir_op_sel_cond] = {
+      /* effectively mov, but must be scheduled only to
+       * PPIR_INSTR_SLOT_ALU_SCL_MUL */
+      .name = "sel_cond",
+      .slots = (int []) {
+         PPIR_INSTR_SLOT_ALU_SCL_MUL, PPIR_INSTR_SLOT_END
+      },
+   },
    [ppir_op_select] = {
       .name = "select",
       .slots = (int []) {
index dbc1c9c32cee33e487a83b7b0c3e96c1d537ffd0..711fe2153b41e3cdb81dce3a677a66e25aed514f 100644 (file)
@@ -174,12 +174,6 @@ static bool ppir_do_one_node_to_instr(ppir_block *block, ppir_node *node, ppir_n
          ppir_node *succ = ppir_node_first_succ(node);
          if (succ->instr_pos == PPIR_INSTR_SLOT_ALU_VEC_ADD) {
             node->instr_pos = PPIR_INSTR_SLOT_ALU_VEC_MUL;
-            /* select instr's condition must be inserted to fmul slot */
-            if (succ->op == ppir_op_select &&
-                ppir_node_first_pred(succ) == node) {
-               assert(alu->dest.ssa.num_components == 1);
-               node->instr_pos = PPIR_INSTR_SLOT_ALU_SCL_MUL;
-            }
             ppir_instr_insert_mul_node(succ, node);
          }
          else if (succ->instr_pos == PPIR_INSTR_SLOT_ALU_SCL_ADD &&
index 63494bab2af5e8605c882011afd858bcaf1cc434..d03b48a828b2c501c3a6bc5fd3bf6ee1d13c0108 100644 (file)
@@ -53,6 +53,7 @@ typedef enum {
    ppir_op_normalize3,
    ppir_op_normalize4,
 
+   ppir_op_sel_cond,
    ppir_op_select,
 
    ppir_op_sin,