table munging
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 22 Jul 2022 14:17:52 +0000 (15:17 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 22 Jul 2022 14:17:52 +0000 (15:17 +0100)
openpower/sv/comparison_table.mdwn

index 0d262cfaa7764f8ce8faf02753f04257614a5da7..43a286dd26abf3f2e3de31bb71de7520b05a0961 100644 (file)
@@ -1,13 +1,13 @@
 # ISA Comparison Table
 
-| Name         | Num <br />opcodes | Class           | Predicate <br /> Masks | Twin <br /> Predication |  Explicit <br /> Vector regs | 128-bit | Bigint <br /> capability | LDST <br /> Fault-First | Data-dependent <br /> Fail-first | Predicate-<br /> Result |
-|--------------|-------------------|-----------------|------------------------|-------------------------|------------------------------|---------|--------------------------|-------------------------|----------------------------------|-------------------------|
-| SVP64        | 5 {1}             | Scalable {2}    | yes                    | yes {3}                 | no {4}                       | n/a {5} | yes {6}                  | yes {7}                 | yes {8}                          | yes {9}                 |
-| VSX          | 700+              | PackedSIMD      | no                     | no                      | yes {10}                     | yes     | no                       | no                      | no                               | no                      |
-| NEON         | ~250 {11}         | PredicatedSIMD  | yes                    | no                      | yes                          | yes     | no                       | no                      | no                               | no                      |
-| SVE2         | ~1000 {12}        | HWSCalable {13} | yes                    | no                      | yes                          | yes     | no                       | yes {7}                 | no                               | no                      |
-| AVX-512 {14} | ~1000s {15}       | PredicatedSIMD  | yes                    | no                      | yes                          | yes     | no                       | no                      | no                               | no                      |
-| RVV {16}     | ~190              | Scalable {17}   | yes                    | no                      | yes                          | yes {18}| no                       | yes                     | no                               | no                      |
+| Name         | Num <br>opcodes   | Taxonomy / <br> Class | Predicate <br> Masks   | Twin <br> Predication   |  Explicit <br> Vector regs   | 128-bit | Bigint <br> capability   | LDST <br> Fault-First   | Data-dependent <br> Fail-first   | Predicate-<br> Result   |
+|--------------|-------------------|-----------------------|------------------------|-------------------------|------------------------------|---------|--------------------------|-------------------------|----------------------------------|-------------------------|
+| SVP64        | 5 {1}             | Scalable {2}          | yes                    | yes {3}                 | no {4}                       | n/a {5} | yes {6}                  | yes {7}                 | yes {8}                          | yes {9}                 |
+| VSX          | 700+              | PackedSIMD            | no                     | no                      | yes {10}                     | yes     | no                       | no                      | no                               | no                      |
+| NEON         | ~250 {11}         | Predicated SIMD       | yes                    | no                      | yes                          | yes     | no                       | no                      | no                               | no                      |
+| SVE2         | ~1000 {12}        | HW Scalable {13}      | yes                    | no                      | yes                          | yes     | no                       | yes {7}                 | no                               | no                      |
+| AVX-512 {14} | ~1000s {15}       | Predicated SIMD       | yes                    | no                      | yes                          | yes     | no                       | no                      | no                               | no                      |
+| RVV {16}     | ~190              | Scalable {17}         | yes                    | no                      | yes                          | yes {18}| no                       | yes                     | no                               | no                      |
 
 * {1}: plus EXT001 24-bit prefixing. See [[sv/svp64]]
 * {2}: A 2-Dimensional Scalable Vector ISA with both Horizontal-First and Vertical-First Modes. See [[sv/vector_isa_comparison]]