SVE2 is actually Predicated SIMD
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 23 Jul 2022 00:40:26 +0000 (01:40 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 23 Jul 2022 00:40:26 +0000 (01:40 +0100)
openpower/sv/comparison_table.mdwn

index bbf8645f7696813a3b9e0ef711a1de34ff023346..b40bacda06195b3a3556cfb2f34772f791fd0a9b 100644 (file)
@@ -4,7 +4,7 @@
 | Draft SVP64    | 5 (1)           | Scalable (2)          | yes                  | yes (3)               | no (4)                     | see (5) | yes (6)                | yes (7)               | yes (8)                        | yes (9)               | yes (10)              |
 | VSX            | 700+            | Packed SIMD           | no                   | no                    | yes (11)                   | yes     | no                     | no                    | no                             | no                    | yes (12)              |
 | NEON           | ~250 (13)       | Predicated SIMD       | yes                  | no                    | yes                        | yes     | no                     | no                    | no                             | no                    | no                    |
-| SVE2           | ~1000 (14)      | Scalable HW only (15) | yes                  | no                    | yes                        | yes     | no                     | yes (7)               | no                             | no                    | no                    |
+| SVE2           | ~1000 (14)      | Predicated SIMD (15)  | yes                  | no                    | yes                        | yes     | no                     | yes (7)               | no                             | no                    | no                    |
 | AVX-512 (16)   | ~1000s (17)     | Predicated SIMD       | yes                  | no                    | yes                        | yes     | no                     | no                    | no                             | no                    | no                    |
 | RVV (18)       | ~190            | Scalable (19)         | yes                  | no                    | yes                        | yes (20)| no                     | yes                   | no                             | no                    | no                    |
 | Aurora SX (21) | ~200 (22)       | Scalable (23)         | yes                  | no                    | yes                        | no      | no                     | no                    | no                             | no                    | no                    |
@@ -25,7 +25,7 @@
   Critically depends on ARM Scalar instructions
 * (14): difficult to exactly ascertain, see ARM Architecture Reference Manual Supplement, DDI 0584.  Critically depends on ARM Scalar instructions.
 * (15): ARM states that the Scalability is a [Silicon-partner choice](https://developer.arm.com/-/media/Arm%20Developer%20Community/PDF/102340_0001_00_en_introduction-to-sve2.pdf?revision=aae96dd2-5334-4ad3-9a47-393086a20fea).
-  Scalability in the ISA is **not available to the programmer**: there is no `setvl` instruction in SVE2, which is already causing assembler programmer difficulties.
+  Scalability in the ISA is **not available to the programmer**: there is no `setvl` instruction in SVE2, which is already causing assembler programmer difficulties. Effectively this makes SVE2 Predicated SIMD where the SIMD width is chosen by the "Silicon partner"
 * (16): [AVX512 Wikipedia](https://en.wikipedia.org/wiki/AVX-512), [Lifecycle of an instruction set](https://media.handmade-seattle.com/tom-forsyth/) including full slides
 * (17): difficult to exactly ascertain, contains subsets. Critically depends on ISA support from earlier x86 ISA subsets (several more thousand instructions). See [SIMD ISA listing](https://www.officedaytime.com/simd512e/)
 * (18): [RVV Spec](https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc)