Pass this constant into the page table constructor.
Change-Id: Icbf730f18d9dfcfebd10a196f7f799514728b0fb
Reviewed-on: https://gem5-review.googlesource.com/7345
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
PTE.u = flags & PTE_Supervisor ? 0 : 1;
}
- /** returns the physical memory address of the page table */
- Addr getBasePtr(ThreadContext* tc)
- {
- CR3 cr3 = pageTablePhysAddr;
- DPRINTF(MMU, "CR3: %d\n", cr3);
- return cr3.longPdtb;
- }
-
/** returns the page number out of a page table entry */
Addr getPnum(PageTableEntry PTE)
{
SyscallDesc *_syscallDescs, int _numSyscallDescs)
: Process(params, params->useArchPT ?
static_cast<EmulationPageTable *>(
- new ArchPageTable(params->name, params->pid,
- params->system, PageBytes,
- PageTableLayout)) :
+ new ArchPageTable(
+ params->name, params->pid,
+ params->system, PageBytes,
+ PageTableLayout,
+ pageTablePhysAddr >> PageShift)) :
new EmulationPageTable(params->name, params->pid,
PageBytes),
objFile),
public:
MultiLevelPageTable(const std::string &__name, uint64_t _pid,
System *_sys, Addr pageSize,
- const std::vector<uint8_t> &layout);
+ const std::vector<uint8_t> &layout,
+ Addr _basePtr);
~MultiLevelPageTable();
void initState(ThreadContext* tc) override;
template <class ISAOps>
MultiLevelPageTable<ISAOps>::MultiLevelPageTable(
const std::string &__name, uint64_t _pid, System *_sys,
- Addr pageSize, const std::vector<uint8_t> &layout)
+ Addr pageSize, const std::vector<uint8_t> &layout, Addr _basePtr)
: EmulationPageTable(__name, _pid, pageSize), system(_sys),
- logLevelSize(layout),
- numLevels(logLevelSize.size())
+ basePtr(_basePtr), logLevelSize(layout), numLevels(logLevelSize.size())
{
}
void
MultiLevelPageTable<ISAOps>::initState(ThreadContext* tc)
{
- basePtr = pTableISAOps.getBasePtr(tc);
- if (basePtr == 0)
- basePtr++;
- DPRINTF(MMU, "basePtr: %d\n", basePtr);
-
system->pagePtr = basePtr;
/* setting first level of the page table */