(no commit message)

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index bbef5ae5be1daa64bb0b216f66ca023b11ca37a1..df226fc32c2897e2ee54174f6a42c5142b2e5a71 100644 (file)
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -521,3 +521,7 @@ This is a minor variant on the CR-based predicate-result mode.  Where ored-resul
         # test passed: store result (and CR?)
         iregs[RT+i] = result
         if Rc=1: crregs[offs+i] = CRnew
+
+This is particularly useful, again, for FP operations that might overflow, where it is desirable to end the loop early, but also desirable to complete at least those operations that were okay (passed the test) without also having to sllow down execution by adding extra instructions that tested for the possibility of that failure, in advance of doing the actual calculation.
+
+The only minor downside here though is the change to VL, which in some implementations may cause pipeline stalls.  This was one of the reasons why CR-based pred-result analysis was added, because that at least is entirely paralleliseable.