radeonsi/gfx10: set llvm_has_working_vgpr_indexing

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 9ea08c8fb260b6c9a1509d01694c476cc0c6d764..7eaa400849ec97c674e01856e367fb6184a7f90b 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1140,10 +1140,9 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
        }
 
        /* While it would be nice not to have this flag, we are constrained
-        * by the reality that LLVM 5.0 doesn't have working VGPR indexing
-        * on GFX9.
+        * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
         */
-       sscreen->llvm_has_working_vgpr_indexing = sscreen->info.chip_class <= GFX8;
+       sscreen->llvm_has_working_vgpr_indexing = sscreen->info.chip_class != GFX9;
 
        /* Some chips have RB+ registers, but don't support RB+. Those must
         * always disable it.