add mention of load/store in questions/analysis

diff --git a/simple_v_extension.mdwn b/simple_v_extension.mdwn
index d90723c1146e33d390adb82d399e88ce0b0a8bd8..b5497b2ea6918f1e5e8df5e5ff1781b6dfa8a12d 100644 (file)
--- a/simple_v_extension.mdwn
+++ b/simple_v_extension.mdwn
@@ -811,6 +811,10 @@ greatly reduce CSR space:
 
 (See "CSR vector-length and CSR SIMD packed-bitwidth" section for details)
 
+In addition, LOAD/STORE has its own associated proposed CSRs that
+mirror the STRIDE (but not yet STRIDE-SEGMENT?) functionality of
+V (and Hwacha).
+
 Also bear in mind that, for reasons of simplicity for implementors,
 I was coming round to the idea of permitting implementors to choose
 exactly which bitwidths they would like to support in hardware and which